Processor

Digital Signal Processor board fPSP) it is hosted into the PC and processes in real time the binary sequences stored into the acquisition board FIFO memories. The board processes arrival times and extracts the correlated AT generated by AE events. The PC picks up the data stored into the DSP memories and calculates the position of the AE sources. 

Hardware problems as the instruments have rather poor processors and custom architecture, it is difficult to test new configurations and, once the new configuration is selected, it is often necessary to strongly modify the hardware in order to adapt the existing instruments. 

The image processor which handles and processes the digital image for display, image enhancement or analysis ... 

Applicable to installed base processors Processing volume (m ) not limited... 

Average daily frei ht <50 mg/m for maximum 15mvday/processor ... 

Compatible with Agfa ecology growth path (when combined with NDT-S processor) Compatible with Agfa ecology growth path... 

To comply with existing and future legislation with respect to silver content in processor rinsing water, the approach developed by Agfa is threefold. 

First, we want to offer G335SF in combination with STRUCTURIX SILVERFIX as a viable solution to customers who want to upgrade their existing equipment (installed base processors) in order to decrease the silver content of their rinsing water. 

Secondly, we offer a new NDT-S processor which is fully compatible with the existing processors, and which, in combination with G335SF and STRUCTURIX SILVERFIX, also offers the possibility to decrease the silver in the rinsing water. 

Thirdly, a NDT-S type cascade processor will be offered. By implementing a fixing cascade in the processor, large decreases of silver content in the rinsing water are possible, even for large customers. 

The changes described above also allowed much easier access to the high voltage cable for routine (6-month) owner directed, service operations, and provided better upper and lower x-ray cabinet and control cabinet ventilation. With the exception of the x-ray tubes, all the individual manufactured components, on all four systems are identical. There are very subtle differences in the warm-up/start-up sequence on the x-ray controllers on the newer systems due to model/year and x-ray tube differences. The last three systems were supplied with environmental type key-boards for the image processors and base-mounted , rather than conduit-mounted exterior warning indicators. The first system was subsequently upgraded to include the better keyboard and the external warning appliances/features. 

The TU contains current electrodes CEl, CE2, potential electrodes PE1,PE2, driver amplifier (DA), button B to start measuring processor. 

The P-scan System 4 can be configured in many ways, dependent on the application. Figure 1 shows a basic system configuration. The P-scan processor (PSP-4) controls the scanner and the water pump. Scarmer operation on site is performed from the remote control unit, as an alternative to the control from the computer. The PSP-4 also includes the ultrasonic system. 

The data are transmitted from the front end processor to the computer in digital form over an ethemet link. The data consist of ultrasonic data, either raw RF A-scans or data processed by the digital signal processor in the PSP-4. In addition to the ultrasonic data, scanner coordinates are transmitted over the ethemet link. 

The system is controlled from a standard PC using the Windows 95 operation system. In the on-line mode, a specially designed processor board is used to sfteed up the processing of data and to offload the PC. 

In principle any PC can be used, provided it has the necessary computing power and memory installed and can be equipped with the processor board, which requires an empty PCI slot in the PC. For using the system in the field, it is recommended to use an industrial PC, designed to be used in a harsh environment. 

The ultrasonic hardware has to be designed to fit the PC boards. The length of the board should only be 160 mm for convenient installations because memory modules and processor cooler can be located behind the 160 mm long slot connector on the motherboard. 

The great advantage of installing an ultrasonic system in a PC is that both the hardware (processor, grafics, power supply,. .) aud the software (evaluation and documentation) are directly available for the inspections. 

The procedure is computationally efficient. For example, for the catalytic subunit of the mammalian cAMP-dependent protein kinase and its inhibitor, with 370 residues and 131 titratable groups, an entire calculation requires 10 hours on an SGI 02 workstation with a 175 MHz MIPS RIOOOO processor. The bulk of the computer time is spent on the FDPB calculations. The speed of the procedure is important, because it makes it possible to collect results on many systems and with many different sets of parameters in a reasonable amount of time. Thus, improvements to the method can be made based on a broad sampling of systems. 

Parallelizing this method was not difficult, given that we already had parallel versions of several multipole algorithms to start from. The entire macroscopic assembly, given its precomputed transfer function, is handled by a single processor which has to perform k extra multipole expansions, one for each level of the macroscopic tree. Each processor is already typically performing many hundreds or thousands of such expansions, so the extra work is minimal. 

The Fourier sum, involving the three dimensional FFT, does not currently run efficiently on more than perhaps eight processors in a network-of-workstations environment. On a more tightly coupled machine such as the Cray T3D/T3E, we obtain reasonable efficiency on 16 processors, as shown in Fig. 5. Our initial production implementation was targeted for a small workstation cluster, so we only parallelized the real-space part, relegating the Fourier component to serial evaluation on the master processor. By Amdahl s principle, the 16% of the work attributable to the serially computed Fourier sum limits our potential speedup on 8 processors to 6.25, a number we are able to approach quite closely. 

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