Parallel computers processor multiplicity

Parallelization A parallel computer uses multiple processors to execute blocks of code concurrently. To make effective use of parallel computers, compilers transform the program to expose data parallelism—in which different processors can execute the same function on different portions of the data. Parallelization typically requires the compiler to determine that entire iterations of a loop are independent of one another. With independent iterations, the distinct processors can each execute an iteration without the need for costly interprocessor synchronization... 

Symmetric multiprocessor A parallel computer with multiple, similar, interconnected processors controlled by a single operating system, and with each processor having equal access to all I/O devices. 

Supercomputers from vendors such as Cray, NEC, and Eujitsu typically consist of between one and eight processors in a shared memory architecture. Peak vector speeds of over 1 GELOP (1000 MELOPS) per processor are now available. Main memories of 1 gigabyte (1000 megabytes) and more are also available. If multiple processors can be tied together to simultaneously work on one problem, substantially greater peak speeds are available. This situation will be further examined in the section on parallel computers. 

More Efficient Computations by Using Parallelized Code in Multiple Processors. 

The development of vector and parallel computers has greatly influenced methods for solving linear systems, for such computers greatly speed up many matrix and vector computations. For instance, the addition of two n-dimensional vectors or of two nxn matrices or multiplication of such a vector or of such a matrix by a constant requires n or arithmetic operations, but all of them can be performed in one parallel step if n or processors are available. Such additional power dramatically increased the previous ability to solve large linear systems in a reasonable amount of time. This development also required revision of the previous classification of known algorithms in order to choose algorithms most suitable for new computers. For instance, Jordan s version of Gaussian elimina-... 

Many companies and parallel processing architectures have come and gone since 1958, but the most popular parallel computer in the twenty-first century consists of multiple nodes connected by a high-speed bus or network, where each node contains many processors connected by shared memory or a high-speed bus or network, and each processor is either pipelined or multi-core. 

MIMD parallel computers are usually divided into shared and distributed memory types. In the shared memory case, multiple processors are connected to memory by a switch so that any processor can access any memory location, and all processors have access to the same global name space. Thus, when each processor refers to the variable x they are all refering to the same location in the shared memory. The shared memory approach to parallelism is attractive because in porting an application from a sequential to a shared memory parallel computer usually only a few changes are required in the sequential... 

Parallel Computing System (PCS) is a system based on parallel processing conception that uses multiple processors which run simultaneously and operate independently. In the system each processor has its own private Internet Protocol (IP) address, memory and space to store data. The data is shared via a communication network. The performance of a PCS depends on the specification of each processor and the memory capacity available in the system. 

One advantage of the bond fluctuation method is that it works well on a variety of platforms, including vector computers, massively parallel computers, and super scalar processors. For a dense polymer melt in three dimensions, the vectorized code gives ca. 1.7 x 10 attempted moves per second for one processor on the Cray YMP for a volume fractions of (f) = 0.41. On massively parallel computers, the program has only been run to date in such a way that each processor ran one independent system. While the method should be parallelizable across multiple processors, this has not been done yet. 

As noted above, one of the goals of NAMD 2 is to take advantage of clusters of symmetric multiprocessor workstations and other non-uniform memory access platforms. This can be achieved in the current design by allowing multiple compute objects to run concurrently on different processors via kernel-level threads. Because compute objects interact in a controlled manner with patches, access controls need only be applied to a small number of structures such as force and energy accumulators. A shared memory environment will therefore contribute almost no parallel overhead and generate communication equal to that of a single-processor node. 

---