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Vector arithmetic processors

Well, the MVP-9500 would need to be unloaded after the VSUBI and reloaded with the same numbers before the VMUL operation, which is obviously a waste of time. A general rule when programming the MVP-9500, and most other arithmetic processors, is to minimize the transfer of data to and from the arithmetic elements. This is the reason for routines like VMMA which performs the operations E = (A B) + (C D) where A to E are n element vectors the intermediate results A B and C D can be stored on the Am9511A stack and added together when the products are complete. [Pg.232]

The development of vector and parallel computers has greatly influenced methods for solving linear systems, for such computers greatly speed up many matrix and vector computations. For instance, the addition of two n-dimensional vectors or of two nxn matrices or multiplication of such a vector or of such a matrix by a constant requires n or arithmetic operations, but all of them can be performed in one parallel step if n or processors are available. Such additional power dramatically increased the previous ability to solve large linear systems in a reasonable amount of time. This development also required revision of the previous classification of known algorithms in order to choose algorithms most suitable for new computers. For instance, Jordan s version of Gaussian elimina-... [Pg.196]

Vector Processor Central processing unit that executes an array of data, processing the data sequentially by decomposing the arithmetic units into components that execute multiple numbers in parallel. [Pg.1408]


See other pages where Vector arithmetic processors is mentioned: [Pg.90]    [Pg.209]    [Pg.465]    [Pg.125]    [Pg.87]    [Pg.234]    [Pg.63]    [Pg.23]    [Pg.30]    [Pg.251]   
See also in sourсe #XX -- [ Pg.208 , Pg.209 ]




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