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Polysilicon

Gate electrodes in MOS devices for high value resistors to insure good ohmic contact to crystalline [Pg.355]

Although germanium was the original semiconductor material in early experiments and production, it is now rarely used as such but mostly as an alloy with silicon.li l l l Some applications of silicon/ germanium are  [Pg.356]

Up to this point, all of the films we have considered (Si02, Si3N4) were deposited under conditions such that they were amorphous. The only defects of interest were particles from the gas phase that might be incorporated into the growing film, or pinholes. Low-pressure CVD has reduced the incidence of particles, and thicker films can minimize the presence of pinholes. [Pg.77]

When we consider silicon films, on the other hand, the nature of the solid deposit is crucial to the behavior of the film. Depending on deposition conditions, we can deposit amorphous, polycrystalline, or single crystal films. As was noted in Chapter 1, the morphology of polycrystalline films can be complex. In the present section, we will review some aspects of polysilicon (poly) thin films deposited by CVD. The final section of this chapter will be devoted to epitaxial silicon thin films. [Pg.77]


Chang J P, Arnold J C, Zau G C H, Shin H-S and Sawin H H 1997 Kinetic study of low energy ion-enhanced plasma etching of polysilicon with atomic/molecular chlorine J. Vac. Sc/. Technol. A 15 1853-63... [Pg.2941]

Polyethylene cross-linked by irradiation with high-energy electrons. Polysilicones cross-linked by reaction with benzoyl peroxide. [Pg.137]

Polysilicon. Polysihcon is used as the gate electrode material in MOS devices, as a conducting material for multilevel metallization, and as contact material for devices having shallow junctions. It is prepared by pyrolyzing silane, SiH, at 575—650°C in a low pressure reactor. The temperature of the process affects the properties of the final film. Higher process temperatures increase the deposition rate, but degrade the uniformity of the layer. Lower temperatures may improve the uniformity, but reduce the throughput to an impractical level. [Pg.348]

Fig. 9.9. How single-crystal films are grown from polysilicon. The electron beam is line-scanned in a direction at right angles to the plane of the drawing. Fig. 9.9. How single-crystal films are grown from polysilicon. The electron beam is line-scanned in a direction at right angles to the plane of the drawing.
NAA has been used to determine trace impurities in polysilicon, single-crystal boules, silicon wafers, and processed silicon, as well as plastics used for packaging. ... [Pg.675]

Comparison of NAA data for polysilicon and single-crystal CZ silicon. ... [Pg.676]

An example of an analysis done on polysilicon and single-crystal Czochralski silicon (CZ) is shown in Table 1. As can be seen, polysilicon, which was used to grow the crystal, is dirtier than the CZ silicon. This is expected, since segregation coefficients limit the incorporation of each element into the crystal boule during the crystal growth process. All values shown in the table are from bulk analysis. Table 2 shows NAA data obtained in an experiment where surface analysis was accom-... [Pg.676]

In the UV most of the materials of interest, e.g. Si, polysilicon, SiGe, GaAs, and other semiconductor materials, are strongly absorbing this enables surface-sensitive measurements. Surface roughness, native oxide covering, material composition, and structural properties can be analyzed. [Pg.269]

Antifoams control foam after it has developed and defoamers are preventative products. Natural products such as castor oil and linseed oil were long ago replaced by synthetics including polysilicones and polyethoxylates. [Pg.389]

Polycrystalline Silicon (Polysilicon). Polycrystalline silicon is used extensively in semiconductor devices. It is normally produced by the decomposition of silane at low pressure (ca. 1 Torr) as follows ... [Pg.222]

Polysilicon is a contraction of polycrystalline silicon, (in contrast with the single-crystal epitaxial silicon). Like epitaxial silicon, polysilicon is also used extensively in the fabrication of IC s and is deposited by CVD.f l it is doped in the same manner as epitaxial silicon. Some applications of poly silicon films are ... [Pg.355]

The short penetration depth of UV/blue photons is the reason that frontside CCD detectors have very poor QE at the blue end of the spectrum. The frontside of a CCD is the side upon which the polysilicon wires that control charge collection and transfer are deposited. These wires are 0.25 to 0.5 /xm thick and will absorb all UV/blue photons before these photons reach the photosensitive volume of the CCD. For good UV/blue sensitivity, a silicon detector must allow the direct penetration of photons into the photosensitive volume. This is achieved by turning the CCD over and thinning the backside until the photosensitive region (the epitaxial layer) is exposed to incoming radiation. [Pg.140]

To produce a very thick n-channel device, the resistivity of the silicon must be made relatively high, about 5,000 to 10,000 H-cm, as opposed to the 20-100 H-cm material used in standard n-channel CCDs. Higher resistivity is required for greater penetration depth of the fields produced by the frontside polysilicon wires (penetration depth is proportional to the square root of the resistivity). These thick high resistivity CCDs have been developed for detection of soft x-rays with space satellites and can be procured from E2V and MIT/LL. [Pg.141]

Figure 15. Photovoltaic detector potential well. The example in this figure is the p-n junction of a n-channel CCD. The x-y-z axes match the orientation shown in Fig. 5. The charge generated in the 3-D volume of a pixel is swept toward a 2-D layer, which is the buried channel that is 0.25-0.5 pm from the front surface of the detector. The z-direction potential is created by the p-n junction combined with the voltages on the polysilicon wires deposited on the frontside of the CCD (not shown in this figure). Figure 15. Photovoltaic detector potential well. The example in this figure is the p-n junction of a n-channel CCD. The x-y-z axes match the orientation shown in Fig. 5. The charge generated in the 3-D volume of a pixel is swept toward a 2-D layer, which is the buried channel that is 0.25-0.5 pm from the front surface of the detector. The z-direction potential is created by the p-n junction combined with the voltages on the polysilicon wires deposited on the frontside of the CCD (not shown in this figure).
Chemical Vapor Deposition- Deposition of silicon oxide films is accomplished by CVD equipment. Either plasma CVD or ozone oxidation is used. Blanket tungsten films are also deposited by CVD equipment to create contact and via plugs. Polysilicon and silicon nitride films are deposited in hot-wall furnaces. TiN diffusion barrier films are deposited by either sputtering or CVD, the latter giving superior step coverage. [Pg.327]

Thermal nrocessing- Difiusion furnaces are used not only for the anneal of implanted dopants but for growing high quality thermcd oxides, depositing polysilicon nitride films (SiN,) and for rapid thermcd processing of deposited films. [Pg.328]

Metal and polysilicon films are formed by a chemical-vapor deposition process using organometallic gases that react at the surface of the IC structure. Various metal silicide films may also be deposited in this manner by reaction with the surface of the silicon wafer to form metal silicides. Glass and pol3uner films are deposited or spin cast or both, as are photoresist films (those of a photosensitive material). This process is accomplished by applying a liquid polymer onto a rapidly rotating wafer. The exact method used varies from manufacturer to manufacturer and usually remains proprietary. [Pg.329]

Here, it is easy to see the various layers and steps necessary to form the IC. We have already emphasized the formation of the n- and p-wells 8uid the individual proeess steps needed for their formation. Note that an epitaxial layer is used in the above model. There are isolation barriers present which we have already discussed. However, once the polysilicon gate transistors are formed, then metal Interconnects must then be placed in proper position with proper electrical isolation. This is the function of the dielectric layers put into place as succeeding layers on the IC dice. Once this is done, then the wafer is tested. [Pg.333]

Kitahara, K. Yamazaki, R. Kurosawa, T. Nakajima, K. Moritani, A. 2002. Analysis of stress in laser-crystallized polysilicon thin films by Raman scattering spectroscopy. Jpn. J. Appl. Phys. 41 5055-5059. [Pg.154]

Monochrome AMPLED flat-panel displays have been made with performance parameters attractive for battery-powered portable applications. The AM backpanel was made of polysilicon material with integrated column and row drivers. Table 1.1 shows a data sheet for a 4" diagonal monochrome display with 960 x 240 pixels [173]. The resolution in horizontal direction was 300 ppi (85pm pitch size), while the resultion in vertical direction was 100 ppi (255 pm pitch size). With 100% pixels turned on at 200 cd/m2, the entire AMPLED panel (including pixel drivers) only consumed eletric power less than 500 mW (with 100% pixels on), which was... [Pg.29]


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Buried polysilicon

Crystal orientations, polysilicon

Defects After Polysilicon CMP

Defects Existing Before and Revealed After Polysilicon CMP

Doping, polysilicon layers

Epitaxial polysilicon

LPCVD of doped polysilicon

LPCVD of polysilicon

POLYSILICONE

POLYSILICONE

Phases, polysilicon

Phosphorus-doped polysilicon

Polysilicon CMP

Polysilicon CMP for Deep Trench Capacitor Fabrication

Polysilicon Residues

Polysilicon etching

Polysilicon films

Polysilicon gate

Polysilicon gate process

Polysilicon process

Polysilicon processing

Polysilicon thin films

Polysilicon thin-film transistors

Polysilicon wire

Polysilicon, deposition

Polysilicon, plasma enhanced

Polysilicon-Filled Trenches

Polysilicones

Resistivity polysilicon

Stability polysilicon layers

Three-layer polysilicon surface

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