Polysilicon gate process

Figure 1. Comparison of conventional polysilicon-gate process to proposed CPI-gate process.

With a view to improving device performance, Kirwan and co-workers proposed the polysilicon self-aligned gate process in 1969. This process not only improved device reliability, it also reduced parasitic capacitances. Furthermore, in 1969, the metal-organic chemical vapor deposition (MOCVD) process was developed hy Manasevit and Simpson, which found widespread adoption in the fabrication of compound semiconductors such as GaAs. 

Figure 13.12 Inputs and outputs for polysilicon gate etch process in semiconductor manufacturing. The measured inputs (CD and 0 ) in the incoming wafer can be used in feedforward control, while the measured outputs...

Polysilicon. Polysihcon is used as the gate electrode material in MOS devices, as a conducting material for multilevel metallization, and as contact material for devices having shallow junctions. It is prepared by pyrolyzing silane, SiH, at 575—650°C in a low pressure reactor. The temperature of the process affects the properties of the final film. Higher process temperatures increase the deposition rate, but degrade the uniformity of the layer. Lower temperatures may improve the uniformity, but reduce the throughput to an impractical level. 

Polysilicon subtrates are usually encountered during MOS device fabrication for defining gate structures. For submicrometer CMOS processing, adhesion problems encountered with this substrate are even more severe. 

Silicon dioxide films have been an essential factor in the manufacture of integrated circuits from the earliest days of the industry. They have been used as a final passivation film to protect against scratches and to getter mobile ion impurities (when doped with phosphorus). Another application has been as an interlayer dielectric between the gate polysilicon and the aluminum metal-ization. Initially, most such films were deposited in atmospheric pressure systems. In recent years, low pressure processes have assumed greater importance. We will begin by examining the atmospheric process. 

In contrast to the films described in the last chapter, the ones to be discussed in this chapter have only become of interest recently. Up to the present, the integrated circuit gate electrodes have been fabricated from LPCVD polysilicon, which is heavily doped with phosphorus in a separate step (either by diffusion or ion implantation). Such heavily doped polysilicon can have resistivities as low as 500 juJ2-cm, so it behaves as a conductor, although not a very good one. Its compatibility with standard processing steps, however, make it a very attractive gate material. 

In the semiconductor technology area most of the experience has been accumulated from research and development in cleaning the silicon substrates. For CMP technologies a variety of additional materials are involved — insulators (like SiOj. doped SiOj, and polymers), high dielectric constant materials (like BaTiOj), polysilicon (doped or undoped), silicides to form low resistivity gate interconnections on top of doped polysilicon, metals (like Cu and Al, and their alloys, W, metal-nitrides, and Ta), silicon nitride, and many others, some of which have been discussed in earlier chapters. Thus cleaning processes must be... 

New materials are applied to maximize the capacity of device. To increase the capacitance of cap used in DRAM, sfudies about high-k dielectric material are in process. Elash memory uses a gate material with polysilicon by reason of high speed and stable storage. To reduce semiconductor device RC delay, Cu metal lines and low-k are being introduced. This section represents the concept of CMP processing being introduced to DRAM and NAND flash devices. 

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