Resistivity polysilicon

To produce a very thick n-channel device, the resistivity of the silicon must be made relatively high, about 5,000 to 10,000 H-cm, as opposed to the 20-100 H-cm material used in standard n-channel CCDs. Higher resistivity is required for greater penetration depth of the fields produced by the frontside polysilicon wires (penetration depth is proportional to the square root of the resistivity). These thick high resistivity CCDs have been developed for detection of soft x-rays with space satellites and can be procured from E2V and MIT/LL. 

The temperature sensor in the membrane center is made of polysilicon with a nominal resistance of 10 kQ. An additional reference resistor is needed for the control circuitry (Sect. 5.1). For the resistance measurement of the sensitive layer, platinum electrodes are deposited on top of the CMOS aluminum metallization in order to establish good electrical contact to the sensitive metal oxide. 

Two identical polysilicon temperature sensors with a nominal resistance value of 10 kQ are located in the membrane center. One resistor is connected to the temperature controller, the other sensor is totally decoupled from the circuitry. This second temperature sensor can be directly accessed via bond pads in a four-point configuration. It enables an accurate calibration and a verification of the temperature controller... 

The main goal of another microhotplate design was the replacement of all CMOS-metal elements within the heated area by materials featuring a better temperature stability. This was accomplished by introducing a novel polysilicon heater layout and a Pt temperature sensor (Sect. 4.3). The Pt-elements had to be passivated for protection and electrical insulation, so that a local deposition of a silicon-nitride passivation through a mask was performed. This silicon-nitride layer also can be varied in its thickness and with regard to its stress characteristics (compressive or tensile). This hotplate allowed for reaching operation temperatures up to 500 °C and it showed a thermal resistance of 7.6 °C/mW. 

A representative sample of terpolymers was exposed to a variety of etchants for polysilicon and silicon dioxide, and the results are given in Table V. The ratio of the etch rate of the substrate to the etch rate of the resist must be at least 2 1 for the resist to be a viable etch mask. Inspection of Table V, shows that the materials examined are unacceptable for only the QFj — CF3CI (4 1) plasma. The etch rates are comparable to those for PMMA the a-keto-oxime exhibits essentially no effect on that rate and the nitrile affords a slight decrease in the plasma etch rate. The etch rates of some commercially available materials are shown for comparison. 

It is not too surprising that vapor-phase HMDS also improves adhesion to this substrate. The native oxide has been shown on Y58 wafers to be easily treated and/or passivated. Actual resist image lift testing on vapor promoted polysilicon wafers produced superior results and no image lifting occurred even for first generation resists known to be susceptible to lifting . 

Step 7. A blanket layer of polysilicon and pattern (mask 2), such that the resist covers only the polysilicon that is to become the gate, is deposited. All exposed polysilicon is etched away. 

Step 8. The n+ -type source and drain regions are created by As ion implantation. The As can penetrate the thin gate oxide, but not the thick field oxide or the polysilicon gate. The formation of the source and gate does not require a separate resist pattern, thus this technique is called self-aligning. 

A 1 ym thick polycrystalline silicon (polysilicon) layer was then deposited by chemical vapor deposition (CVD). Phosphorus doping of polysilicon was done by ion implantation with a dosage of 1Cr° cm-2 and a voltage of 200 keV. The polysilicon sheet resistance of 50 SI/ was obtained after post-implant activation (Figure 1a). 

A phosphorus-doped polysilicon layer was used as the sensor heater. Its temperature coefficient of resistivity was positive with a value of 6 x 10 4°C 1. The value of the heater resistance as a function of temperature was used to indicate the sensor temperature. 

In contrast to the films described in the last chapter, the ones to be discussed in this chapter have only become of interest recently. Up to the present, the integrated circuit gate electrodes have been fabricated from LPCVD polysilicon, which is heavily doped with phosphorus in a separate step (either by diffusion or ion implantation). Such heavily doped polysilicon can have resistivities as low as 500 juJ2-cm, so it behaves as a conductor, although not a very good one. Its compatibility with standard processing steps, however, make it a very attractive gate material. 

Figure 6 Resistivity of WSix films on polysilicon with furnace anneals.7...

An interesting effect was observed by varying the pressure between 80 and 400 mTorr. At pressures of 180 mTorr and above, the deposition rate jumped from 600 to 2000 A/min. At the same time, resistivity rose as high as 4000 pi2-cm. The variation with pressure is shown in Figure 12. Apparently, the stoichiometry changed dramatically at pressures of 180 mTorr and higher. In fact, there is very little Ta in the film created at 400 mTorr (about 13%), so this is mostly a polysilicon film. 

Aside from the reactant gases that can be used, another factor influencing the nature of the films is ion bombardment. If ion bombardment is increased at a given deposition temperature, it is possible to convert an amorphous film to one which is microcrystalline. As ion bombardment continues to increase, the volume of crystallites display lower resistivity, as would be expected. The as-deposited resistivity of PECVD polysilicon has been shown to have a value of 0.78 x 106 S2-cm, as compared to similar film done by LPCVD which is 13.8 x 106 2-cm. 

At the same time, the fully doped polysilicon resistivity (LPCVD or PECVD) is proving inadequate for future generation IC devices, and interest is shifting to refractory metal silicides and/or refractory metals as replacements. Therefore, it is not clear how significant the development of such a new process will be for integrated circuit manufacture. There are other applications, however, where it may be better suited. 

Cohalt Silicides. The interest in the study of metal silicides is growing at much faster rate because of their use as interconnects and contacts in semiconductor and VLSI technology. The silicides in general have lower resistivity than polysilicon and are able to withstand high annealing temperatures than most pure metal interconnects. In the development of the metal-silicide studies the most important quantities of interest are metal/Si ratio as a function of depth, the silicide film thickness and the identification and the quantification of any contaminants present. The conventional surface analysis techniques... 

Tungsten silicide deposited by DCS reduction contains much less fluorine than that by monosilane reduction, and the chlorine content is also low. Consequently, DCS is replacing monosilane in the CVD-WSix process because of good step coverage, good adhesion to polysilicon and Si02 and low resistivity. 

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