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Junctions shallow

Polysilicon. Polysihcon is used as the gate electrode material in MOS devices, as a conducting material for multilevel metallization, and as contact material for devices having shallow junctions. It is prepared by pyrolyzing silane, SiH, at 575—650°C in a low pressure reactor. The temperature of the process affects the properties of the final film. Higher process temperatures increase the deposition rate, but degrade the uniformity of the layer. Lower temperatures may improve the uniformity, but reduce the throughput to an impractical level. [Pg.348]

In order to prevent aluminum from spiking through shallow junctions, 1-2% silicon is often added to the film. Since SiCl4 is volatile at room temperature, aluminum-silicon films can be readily etched in chlorine-containing gases. [Pg.244]

One of the most widely used materials for the fabrication of modern VLSI circuits is polycrystalline silicon, commonly referred to as polysilicon. It is used for the gate electrode in metal oxide semiconductor (MOS) devices, for the fabrication of high value resistors, for diffusion sources to form shallow junctions, for conduction lines, and for ensuring ohmic contact between crystalline silicon substrates and overlying metallization structures. [Pg.606]

Abstract Ultra-shallow junction formation in metal oxide semiconductor field effect... [Pg.89]

Surface roughness is an important factor in the performance and reliability of devices having microscopic dimensions [136]. It can essentially affect all aspects of silicon technology [168, 169]. To guarantee the performance of electronic devices the microstructures fabricated from silicon are required to be smooth, with roughness much smaller than the dimensions of the structure components [127]. As the device dimension gets smaller the device will be composed of thinner oxides and shallower junctions and the effect of surface roughness will become critical. [Pg.795]

As the integration goes on it can be envisioned that the role of the mono-silicon/tungsten interface becomes less since the device performance demands more and more the technique of cladding the shallow junction areas with silicides. [Pg.54]

Another important phenomenon to be checked is the leakage current of shallow junction diodes. The leakage current provides valuable information about the quality of the Si-W interface and whether unallowed amounts of silicon are consumed during the selective tungsten deposition process. Again, one can expect that blanket tungsten gives less problems here because of the presence of the adhesion-barrier layer. [Pg.81]

All of the three preceding techniques are used to measure junction depth. There is general agreement between the three techniques for deep junctions with junction depths of the order of 1-2 gm or greater. However, for shallow junctions it is believed that SIMS gives the most accurate results. This question is under active investigation at present because junctions with depths of <.0.5 gm are not easy to measure precisely. [Pg.26]

One of the yield limitations in an advanced bipolar technology is the collector-emitter leakage due to "pipes" which are associated with material defects (17), and generally the pipe density will increase with shallower junctions required for VLSI technologies. [Pg.64]

On the other hand, by using more than one ion-implantation step followed by drive-in with or without a subsequent epitaxy step, adjacent etch-stop regions of different depths can be achieved [24, 25]. Shallower junctions can be created either by a shallow diffusion or by an epitaxial step. [Pg.77]

Integrated circuit technology requires a reduction in device dimensions. The junction depth, where the donor and acceptor concentrations are equal, is set between 10 and 30 nm. These shallow junction requirements restrict ion implantation technology - not on the implantation procedures themselves, but on the subsequent diffusion of the implanted species during thermal annealing. [Pg.122]

Figure 9.12 shows boron depth profiles for a B dose of 1015cm 2 at an implantation energy of 0.5 keV and thermal heat treatment at 1,050°C for 10 s. The boron depth profile for 0.5 keV implants is consistent with shallow junction requirements of junction depths of 20 nm. After thermal annealing, the boron profile has spread to depths of 100 nm or more - well beyond the shallow junction... [Pg.122]

Shao, L., Chen, J., Zhang, J., Tang, D., Patel, S., Liu, J., Wang, X., Chu, W-K. Using point defect engineering to reduce the effects of energy nonmonochromaticity of B ion beams on shallow junction formation. J. Appl. Phys. 96, 919-921 (2004)... [Pg.210]


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See also in sourсe #XX -- [ Pg.77 ]




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