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Metal lift off process

A shadow-mask technique has been applied for the local metal deposition to exclude metal residues on other designs processed on the same wafer (Fig. 4.2b). Such metal residues may be caused by imperfections in the patterned resist due to topographical features on the processed CMOS wafers or dust particles. The metal film is only deposited in those areas on the wafer, where it is needed for electrode coverage on the microhotplates. This also renders the lift-off process easier since no closed metal film is formed on the wafer, so that the acetone has a large surface to attack the photoresist. Another advantage of the local metal lift-off process is its full compatibility with the fabrication sequence of chemical sensors based on other transducer principles [20]. [Pg.33]

Figure 7. Metal lift-off process using a trilevel-resist scheme, (a and b) The image created in the top-layer resist is transferred via the isolation layer to the bottom planarizing layer by an isotropic etch, (c) The sloped side wall of the planarizing layer has an overhanging transfer layer that breaks up the continuity of the metal film sputter deposited onto the system. (d) Subsequent dissolution of the bottom layer carries off parts of the metal film adhering to the resist layers, and well-defined metal lines are left. Figure 7. Metal lift-off process using a trilevel-resist scheme, (a and b) The image created in the top-layer resist is transferred via the isolation layer to the bottom planarizing layer by an isotropic etch, (c) The sloped side wall of the planarizing layer has an overhanging transfer layer that breaks up the continuity of the metal film sputter deposited onto the system. (d) Subsequent dissolution of the bottom layer carries off parts of the metal film adhering to the resist layers, and well-defined metal lines are left.
The LOFO approach, based on capillary interactions induced by liquid-solid interfaces, is used for transferring prefabricated thin solid metal films onto molecu-larly modified solid substrates. In spite of the fact that the glass/metal pad during the lift-off process leaves a relatively rough (1 nm) surface, several types of device have been fabricated by LOFO [154-156]. [Pg.98]

In the lift-off process, a blanket metal coating is deposited, usually by evaporation, over the photoresist, which is then dissolved to lift off the unwanted metal and leave the desired pattern. The lift-off process may be assisted by depositing and patterning a dielectric layer, a release layer, or both beneath the photoresist (131, 132). In both additive approaches, via posts are patterned in a step separate from that used to pattern the conductor lines. The polyimide is then coated over the lines and via posts, and shallow etching or mechanical polishing is done to expose the top of the via posts. The process sequence is then repeated to pattern additional layers. [Pg.491]

The lift-off process is usually employed to fabricate metal electrodes. This method, as opposed to the wet-etch process, allows the dual-composition electrode to be patterned in a single step [747]. In order to achieve well-defined metal electrodes in a channel recess using the lift-off technique, the metal (Pt/Ta) will not be deposited onto the sidewalls of the photoresist structure (see Figure 2.32). This discontinuity of the deposited metal layer around the sidewalls allows metal on the resist to be removed cleanly from the surface without tearing away from the metal on the surface. Thus negative resists were used because they can be easily processed to produce negatively inclined sidewalls. To achieve this, the photoresist is subjected to underexposure, followed by overdevelopment [141]. [Pg.46]

The detector disclosed in US-A-S006711 refers to an HgCdTe multi-element detector array formed on a sapphire substrate. The elements have individual electrodes and a common electrode. When the electrodes are formed by a lift-off process, the maximum thickness of the metal layer forming the electrodes is limited due to the operational characteristics of the lift-off process. This results in a non-negligible resistance of the common electrode, which gives the device a low sensitivity. To reduce the resistance of the common electrode, an auxiliaiy electrode is formed on an aperture plate such that when the aperture plate is assembled onto the detector, the auxiliary electrode is pressed onto the common electrode. [Pg.88]

A body of HgCdTe is first mounted on a sapphire substrate 2. A first etchant mask is formed and individual detector elements 5 are formed by etching. Thereafter a second etchant mask 7 is formed, a metal layer is deposited and metal regions are formed by a lift-off process. [Pg.115]

In [55] a large-area fabrication of hexagonally ordered metal dot arrays with an area density of 10u/cm2 was demonstrated. The metal dots were produced by an electron beam evaporation followed by a lift-off process. The dots size was 20 nm dots with a 40 nm period by combining block copolymer nanolithography and a trilayer resist technique. A self-assembled spherical-phase block copolymer top layer spontaneously generated the pattern, acting as a template. The pattern was first transferred to a silicon nitride middle layer by reactive ion etch, producing holes. The nitride layer was then used as a mask to further etch into a polyamide bottom layer. [Pg.279]

A variation of the selective Cu deposition process, limited to electroless Cu deposition, is the lift-off process, known as a planarized metallization process [102]. Figure 39 shows a process sequence for this technology. [Pg.137]

Fig. 39 The process sequence for the lift-off process (the planarized metallization process) (a) a resist film is patterned on a dielectric film, (b) dielectric patterning, (c) thin catalytic film layer (PVD or CVD Ti, Al) is deposited, (d) a lift-off technique removes the excess material, leaving the catalytic layer in the trench only,... Fig. 39 The process sequence for the lift-off process (the planarized metallization process) (a) a resist film is patterned on a dielectric film, (b) dielectric patterning, (c) thin catalytic film layer (PVD or CVD Ti, Al) is deposited, (d) a lift-off technique removes the excess material, leaving the catalytic layer in the trench only,...
Depending on the metal deposited, the lift-off process may vary. Copper is insoluble in an aqueous solution, therefore the etching mask needs to be removed by dipping the substrate in an appropriate stripping solution. However, because aluminum dissolves in both acid and alkaline solutions, following the evaporation of this metal, a photoresist layer is normally applied and patterned to protect the desired metal in vias/channels. This protection layer is stripped off after the lift-off mask is removed. Note that the photoresist layer in this process must withstand whatever solution is used to etch the RIE mask. This technique produces a truly planar surface for the next layer. [Pg.27]

The development of the resin to form microelectrode arrays is mostly based on the lift-off process (164). A solvent dissolves the remaining soluble positive photoresist underneath the metal, starting at the edge or lip of the unexposed photoresist and lift off the metal in the process (Figure 10.13). When the photoresist is removed, all metal on top of the photoresist strip strips off automatically while metal on the top of the photoresist lines stays. [Pg.413]

Electron beam lithography using HSQ often utilises a lift off process illustrated in Fig. 13.5. The lift-off process involves deposition of a material (often a metal) on top of a patterned resist layer. Where there is no resist present, the metal adheres to the semiconductor substrate. However, metal deposited on top of the resist can be removed when developing the resist. [Pg.452]

The silicon device layer is metallized with gold (500 nm Au/20 nm Cr) and patterned with the PAD METAL mask using a photolithographic lift-off process that is capable of defining 3 pm lines and spaces with a 3 pm alignment tolerance. This metal layer is exposed to high temperatures during the subsequent process steps, so it does not provide an optical quality surface for mirrors like the second metallization that is patterned with the BLANKET METAL mask. Any metal features that are defined in the first metal deposition will be in electrical contact unless they are separated by a trench etched in the device layer since the surface of the device layer is heavily doped with phosphorus. [Pg.14]

The first reported use of NIL was in 1995 by Chou et al. who fabricated 25 nm diameter dots with a 120 nm period by thermal nanoimprint lithography (TNIL). In their work, a thermoplastic material, poly(methyl methacrylate) (PMMA), was used as the moldable material followed by oxygen plasma reactive ion etch (RIE) process to expose the substrate. The deposition of titanium/gold via evaporation and lift-off to yield an array of individually isolated titanium/gold dots was achieved with success. Figure 2 shows the imprinted PMMA template and the titanium/gold dot array after metallization and lift-off processes. [Pg.252]


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