Lift-off processes

Static 75As NMR of the CT in powdered films of Al Ga As has been used to obtain information about possible ordering in this alloy. The milligram quantities used were obtained by an epitaxial lift-off process from the MOVPE growth substrate and subsequent pulverization. Signals from 75As[A14] and 75As[Ga4]... 

The LOFO approach, based on capillary interactions induced by liquid-solid interfaces, is used for transferring prefabricated thin solid metal films onto molecu-larly modified solid substrates. In spite of the fact that the glass/metal pad during the lift-off process leaves a relatively rough (1 nm) surface, several types of device have been fabricated by LOFO [154-156]. 

Atsuta, K. Suzuki, H. Takeuchi, S., A parylene lift off process with microfluidic channels for selective protein patterning, J. Micromech. Microeng. 2007, 17, 496 500... 

Fig. 4.3. SEM micrograph of image-reversal resist stripes of a test pattern after photolithography. The resist shows an rmdercut profile as desired for the lift-off process...

A shadow-mask technique has been applied for the local metal deposition to exclude metal residues on other designs processed on the same wafer (Fig. 4.2b). Such metal residues may be caused by imperfections in the patterned resist due to topographical features on the processed CMOS wafers or dust particles. The metal film is only deposited in those areas on the wafer, where it is needed for electrode coverage on the microhotplates. This also renders the lift-off process easier since no closed metal film is formed on the wafer, so that the acetone has a large surface to attack the photoresist. Another advantage of the local metal lift-off process is its full compatibility with the fabrication sequence of chemical sensors based on other transducer principles [20]. 

After the lift-off process, the surface of the wafer is exposed to an O2-plasma in a plasma asher to remove possible resist residues, and to activate the surface for the subsequent nitride deposition. 

Figure 19.5. Process sequence for the lift-off process (the planarized metalhzation process) (a) a resist film is patterned on a dielectric film (b) dielectric patterning (c) a thin catalytic film layer (PVD or CVD Ti, Al) is deposited (d) a lift-off technique removes the excess material, leaving the catalytic layer in the trench only (e) electroless Cu deposition.

Figure 6.12 Preparation of patterned LBL assemblies (a) by nanotransfer printing and (b) by sequentially using nanoimprinting lithography, CD SAM formation, and lift-off process. Reprinted with permission from Crespo-Biel et al. (2006).

The resist has been used as a mask in wet etching and in lift-off processes, and more recently in etching chromium films in a chlorine-oxygen-helium plasma. In the latter, the etch rates have ranged from 4 to 5.5nm/min at lOOW power in a barrel type reactor. Chromium etches at about 6.5nm/min under these conditions. The etch rate of the resist appears to be independent of the degree to which it has been cured before exposure, so the sensitive form described here is just as effective a mask as the highly cross-linked resists described earlier, at least in the chromium etching process. 

Figure 8. Electron micrographs of a trilevel aluminum lift off process employing a typical polysilane as the 02-RIE barrier. Key left, electron-beam imaged and right, optically imaged Mann step and repeat.

Aliphatic aldehydes, polymers, 399-421 Alkoxyacetophenones, primary reactions, 458 Aluminum lift off process, trilevel, 307/... 

Figure 7. Metal lift-off process using a trilevel-resist scheme, (a and b) The image created in the top-layer resist is transferred via the isolation layer to the bottom planarizing layer by an isotropic etch, (c) The sloped side wall of the planarizing layer has an overhanging transfer layer that breaks up the continuity of the metal film sputter deposited onto the system. (d) Subsequent dissolution of the bottom layer carries off parts of the metal film adhering to the resist layers, and well-defined metal lines are left.

In the lift-off process, a blanket metal coating is deposited, usually by evaporation, over the photoresist, which is then dissolved to lift off the unwanted metal and leave the desired pattern. The lift-off process may be assisted by depositing and patterning a dielectric layer, a release layer, or both beneath the photoresist (131, 132). In both additive approaches, via posts are patterned in a step separate from that used to pattern the conductor lines. The polyimide is then coated over the lines and via posts, and shallow etching or mechanical polishing is done to expose the top of the via posts. The process sequence is then repeated to pattern additional layers. 

The lift-off process is usually employed to fabricate metal electrodes. This method, as opposed to the wet-etch process, allows the dual-composition electrode to be patterned in a single step [747]. In order to achieve well-defined metal electrodes in a channel recess using the lift-off technique, the metal (Pt/Ta) will not be deposited onto the sidewalls of the photoresist structure (see Figure 2.32). This discontinuity of the deposited metal layer around the sidewalls allows metal on the resist to be removed cleanly from the surface without tearing away from the metal on the surface. Thus negative resists were used because they can be easily processed to produce negatively inclined sidewalls. To achieve this, the photoresist is subjected to underexposure, followed by overdevelopment [141]. 

Hippocampal neurons from embryonic mice Photolithography for local oxidation of PEO (lift-off process), protein backfill 2008 [105]... 

The detector disclosed in US-A-S006711 refers to an HgCdTe multi-element detector array formed on a sapphire substrate. The elements have individual electrodes and a common electrode. When the electrodes are formed by a lift-off process, the maximum thickness of the metal layer forming the electrodes is limited due to the operational characteristics of the lift-off process. This results in a non-negligible resistance of the common electrode, which gives the device a low sensitivity. To reduce the resistance of the common electrode, an auxiliaiy electrode is formed on an aperture plate such that when the aperture plate is assembled onto the detector, the auxiliary electrode is pressed onto the common electrode. 

A body of HgCdTe is first mounted on a sapphire substrate 2. A first etchant mask is formed and individual detector elements 5 are formed by etching. Thereafter a second etchant mask 7 is formed, a metal layer is deposited and metal regions are formed by a lift-off process. 

A substrate 10 of silicon comprising an array of switching elements is prepared. Contact pads such as 16 and 18 are connected to inputs of the switching elements. A protective nitride layer 20 is formed, with openings for the contact pads, on top of the substrate. A layer of photoresist 25 is patterned on top of the nitride layer. A layer of indium alloy 26, fabricated from a combination of indium, bismuth, lead, cadmium and tin, is deposited on the substate so as to contact the contact pads. This layer is built up such that its upper surface is higher than the structures that constitute the topography of the substrate. Portions of the conductive layer overlying the photo-resist are removed by a lift off process... 

The electrocoloration (high-field stress) experiments were performed on Fe-doped SrTiC>3 single crystals (0.22 mol % Fe). Circular microelectrodes (10 pm in diameter and 20 or 30 pm in distance) were again prepared by a lithographic lift-off process from an evaporated 20 nm Cr/200 nm Au film. Two further Cr/Au electrode stripes were used to achieve the resistance degradation (see Fig. 32a). At 493 K, an electrical... 

In [55] a large-area fabrication of hexagonally ordered metal dot arrays with an area density of 10u/cm2 was demonstrated. The metal dots were produced by an electron beam evaporation followed by a lift-off process. The dots size was 20 nm dots with a 40 nm period by combining block copolymer nanolithography and a trilayer resist technique. A self-assembled spherical-phase block copolymer top layer spontaneously generated the pattern, acting as a template. The pattern was first transferred to a silicon nitride middle layer by reactive ion etch, producing holes. The nitride layer was then used as a mask to further etch into a polyamide bottom layer. 

Ferromagnetic rings are also fabricated by using electron-beam lithography with a lift-off process for pattern transfer [76]. These nanoscale ferromagnetic rings have a smallest outer diameter of 90 nm, inner diameter of 30 nm and thickness of 10 nm. 

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