Integrated circuits , fabrication

First planar integrated circuits fabricated r Electron beam lithography demonstrated Dry film laminate resist introduced... 

Deposition of Thin Films. Laser photochemical deposition has been extensively studied, especially with respect to fabrication of microelectronic stmctures (see Integrated circuits). This procedure could be used in integrated circuit fabrication for the direct generation of patterns. Laser-aided chemical vapor deposition, which can be used to deposit layers of semiconductors, metals, and insulators, could define the circuit features. The deposits can have dimensions in the micrometer regime and they can be produced in specific patterns. Laser chemical vapor deposition can use either of two approaches. 

The term direct TXRF refers to surface impurity analysis with no surface preparation, as described above, achieving detection Umits of 10 °—10 cm for heavy-metal atoms on the silicon surface. The increasit complexity of integrated circuits fabricated from silicon wafers will demand even greater surfrce purity in the future, with accordingly better detection limits in analytical techniques. Detection limits of less than 10 cm can be achieved, for example, for Fe, using a preconcentration technique known as Vapor Phase Decomposition (VPD). 

Luo, J. and Dorfeld, D. A., Material Removal Regions in Chemical Mechanical Planarization for Sub-micron Integrated Circuit Fabrication Coupling Effects of Slurry Chemicals, Abrasive Size Distribution and Wafer-Pad Contact Area, IEEE Trans. Semicond. Manuf, Vol. 16, No. 1, 2003, pp. 45-56. 

Elliott, D., 1989, Integrated circuit fabrication technology, McGraw-Hill, New York. 

Phadke, M.S., Kackar, R.N., Speeney, D.V., and Grieco, M.J. (1983), Off-Line (Juality Control in Integrated Circuit Fabrication Using Experimental Design, Bell Sys. Tech. J., 62, 1273-1309. 

Implications of Electronic and Ionic Conductivities of Polyimide Films in Integrated Circuit Fabrication... 

The increasing importance of multilevel interconnection systems and surface passivation in integrated circuit fabrication has stimulated interest in polyimide films for application in silicon device processing both as multilevel insulators and overcoat layers. The ability of polyimide films to planarize stepped device geometries, as well as their thermal and chemical inertness have been previously reported, as have various physical and electrical parameters related to circuit stability and reliability in use (1, 3). This paper focuses on three aspects of the electrical conductivity of polyimide (PI) films prepared from Hitachi and DuPont resins, indicating implications of each conductivity component for device reliability. The three forms of polyimide conductivity considered here are bulk electronic ionic, associated with intentional sodium contamination and surface or interface conductance. 

Gise, Peter G. Blanchard, Richard "Semiconductor and Integrated Circuit Fabrication Techniques" Reston Publishing Company Reston, VA 1979. 

Imaging MS is and will become increasingly critical for many aspects of materials science. One example is in the semiconductor industry, where the ability to provide spatial and chemical information on the length scales of current integrated circuit fabrication (50 nm or better) with depth profiling to provide layer-by-layer maps of the fabricated layers is critical for the continued advancement of the computer industry. Maps of any heterogeneous surface are important in other areas of materials science. For example, using various laser desorption techniques, information about the molecules found in specific inclusions in meteorites or defects in reactive surfaces can be obtained. 

Other systems can be treated in a similar manner such as the Ti-B-CI-H system,10 and of course the Si-H-CI system has been exhaustively studied because of the commercial importance of silicon epitaxial films used for integrated circuit fabrication.11... 

One of the problems with cold wall systems is the difficulty in maintaining a very uniform temperature on the wafers. Such concern can be eliminated if the entire reactor chamber is placed within a furnace maintained at a very uniform temperature. An ideal candidate for such a furnace is the standard diffusion tube furnace already in wide use for integrated circuit fabrication. If in addition, wafers could be loaded vertically as in a diffusion furnace, the reactor throughput could be substantial. 

There are many elements and alloys that possess the electrical property known as band gap [5] that are useful for semiconductor devices. Silicon became the lynchpin material for device fabrication. It is currently, and will continue to be, the most important material for integrated circuit fabrication. Alloys of group III and V elements are important for optical devices such as lasers, optical detectors, and specialized high-speed circuits. In this paper, the fabrication of silicon devices will be used to illustrate the role of chemical processing in circuit manufacture. 

Interpretations of the early stages of metallization of PMDA-ODA are controversial, but the data are more extensive than for polystyrene. PMDA-ODA has been featured for use in integrated circuit fabrication and lately, for mapping the engineering (57), physics and chemistry of polymer metallization (58). Many analysts of XPS, ultraviolet photoelectron spectroscopy (UPS), near edge... 

Warner K, Chen C, D Onofrio R, Keast C, Poesse S. An investigation of wafer-to-wafer alignment tolerances for three-dimensional integrated circuit fabrication. Proceedings of The IEEE International SOI Conference 2004. p 71-72. 

The transition metals are used as metallization layers in Si device technology Upon heating, the thin (a few thousand A thick) transition-metal layers react uniformly with the Si substrate to form a silicide. From a typical transition-metal-Si binary phase diagram (see Fig. 1), the lowest T at which a liquid appears is greater than 900°C, which is above the process T used in integrated circuit fabrication. In Si device processing, silicide formation is therefore usually a solid-phase interaction. 

Chemical Mechanical Planarization (CMP) plays an important role in today s microelectronics industry. With its ability to achieve global planarization, its universality (material insensitivity), its applicability to multimaterial surfaces, and its relative cost-effectiveness, CMP is the ideal planarizing medium for the interlayered dielectrics and metal films used in silicon integrated circuit fabrication. But although the past decade has seen unprecedented research and development into CMP, there has been no single-source reference to this rapidly emerging technology - until now. 

Photolithography—A method of integrated circuit fabrication that uses a light-sensitive polymer to pattern a silicon wafer with other materials. 

Photoresist—Photosensitive polymer that is used to pattern silicon wafers during integrated circuit fabrication. 

---