Sputter deposition layered structures

Wan, C. H., Lin, M. T., Zhuang, Q. H., and Lin, C. H. Preparation and performance of novel MEA with multicatalyst layer structure for PEFC by magnetron sputter deposition technique. Surface and Coatings Technology 2006 201 214-222. 

A 5.5 (xm photoresist layer was patterned as the sacrificial layer, followed by the deposition of a second 4.5 p,m parylene layer. The parylene/photoresist/ parylene sandwich structure formed the electrospray nozzle and channel when the photoresist was subsequently dissolved. A 1500 A sputtered aluminum layer was used as a mask for parylene etching to define the shape of the nozzle. Aluminum was removed by a wet etching process. After SU-8 developing, wafers were left inside the SU-8 developer for 2 days to release the photoresist. A serpentine channel (250 pan x 500 pm x 15 mm) extending from the junction of pump channels to the edge of the chip was patterned in the SU-8 layer. Platinum/titanium lines spaced 200 pm apart were patterned under the channel after the electrode deposition step. 

A ZnS insulating layer 114 is deposited on a sensing layer 112 of HgCdTe. A refractory metal, such as tantalum, molybdenum, tungsten, titanium or refractory metal alloys such as titanium/tungsten, is sputter-deposited onto the insulating layer. The structure is connected to... 

This type of material is commonly used in the production of semiconductor devices.57 The silica layer is used as a starting layer for integrated circuit (IC) build-up. IC layer materials range from single crystals and doped polycrystalline silicon, silicon nitride, thermally-grown oxide to vapour deposited or sputtered metal or metal silicide layers. Structural adhesion of the various layers is obtained by the application of organosilanes, such as AEAPTS, APTS and GPTS. 

The results presented in this section further illustrate that there is a considerable dependence of the band alignment at the CdS/ZnO interface on the details of its preparation. An important factor is the local structure of the ZnO film. There is considerable local disorder when the films are deposited at room temperature in pure Ar, deposition conditions that are often used in thin film solar cells. It is recalled that the disorder is only on a local scale and does not affect the long range order of the films, as obvious from clear X-ray diffraction patterns recorded from such films (see discussion in Sect. 4.2.3.3). Growth of sputter deposited ZnO on CdS always results in an amorphous nucleation layer at the interface. The amorphous nucleation layer affects the valence band offset. 

To give an individual value for the band alignment is not possible. Structurally well-ordered interfaces, which are obtained e.g., by deposition of CdS onto ZnO layers deposited at higher temperatures and/or with the addition of oxygen to the sputter gas, show a valence band offset of A TV is = 1.2 eV in good agreement with theoretical calculations [103]. Sputter deposition of undoped ZnO at room temperature in pure Ar onto CdS also leads to a valence band offset of 1.2 eV. In view of the observed dependencies of the band offsets this agreement is fortuitous, as the influence of the local disorder and of the amorphous nucleation layer most likely cancel each other. 

The doped and intrinsic silicon layers (p, i, n) are packed between a TCO front contact and a highly reflective back contact. The back contact is usually either a metal like silver (Ag) or aluminum (Al), or a TCO/metal double layer structure. The latter has been shown to reduce absorption losses due to a better grain growth of Ag layers onto ZnO. Additionally, absorption losses due to surface plasmons in the metal film have to be considered [33]. Both effects result in a higher reflectivity of the TCO/Ag back reflector. In module production, magnetron sputtered ZnO is usually applied as TCO-material for the back reflector in combination with either Ag (highest reflectivity) or Al (low cost). Depending on the deposition sequence of the doped and intrinsic silicon layers, one speaks of so-called superstrate (p-i-n) or substrate (n-i-p) cell structure (see Fig. 8.4). 

X-ray photoelectron spectroscopy has been used to study the metal polyimide interface formed during room temperature metal deposition. Several mono-layers of Al, Au and Cu were sputter-deposited onto cured polyimide, to a thickness which permitted the observation of both polyimide and metal peaks. Deconvolution of core-level Cls, Nls and Ols polyimide peaks and A12p, Au4f and Cu2p3/2 metal overlayer peaks has demonstrated that chemical reaction occurs at the carbonyl sites for all these metals under the conditions used. In addition, the aromatic nature of the molecular structure at the interface is believed to decrease while the percentage of an isoimide-like component increases. 

After the bottom pole and insulator, a microwinding Cu coil is electrode-posited [121]. The insulator has to be prepared for the electrodeposition of Cu. This preparation involves the deposition of Cr/Cu bilayer by sputtering or evaporation. First, a thin layer (10 nm) of Cr is deposited onto the insulator. The function of the Cr layer is to provide a bonding layer between the insulator and Cu. A thin (50-100 nm) layer of Cu seed layer is then sputter deposited on Cr layer to provide sufficient electrical conductivity for subsequent electrodeposition of Cu. Cu is electrodeposited using deposition-through-mask technique. After electrodeposition of Cu coil, an insulator layer is deposited between the coil and the top pole layer. The top Permalloy pole is electrodeposited in the same way as the bottom pole layer, on thin sputter-deposited Permalloy underlayer (50-100 nm). The top and bottom pole layers are in contact. Finally, Cu interconnect pads, about 25-pm thick, are electrodeposited. The entire structure, poles and coil, is protected by an overcoat, usually sputtered AI2O3. The dimensions... 

The Jet Propulsion Laboratory (JPL) has researched the stated objectives by investigating sputter-deposition (SD) of designed anode and cathode nanostructures of Pt-alloys, and electronic structures and microstructures of sputter-deposited catalyst layers. JPL has used the information derived from these investigations to develop novel catalysts and membrane electrode assemblies (MEAs) that... 

SEM photographs of sputtered films show that the layers are fairly dense and appear to crack into platelets when subjected to MEA fabrication. The dense films do not lend themselves to high surface areas therefore, there is substantial scope for enhancement of performance if the surface area can be increased. This may be achieved by producing porous 3-D Pt-Ru layered structures. One such method for creating such 3-D structures, that seem to be extremely promising, involves the pre-treatment of the membrane surface by ion-beam etching, which is then followed by sputter-deposition of the metal. This results in substantially enhanced surface area and very rough nanostructures. Next year s effort will include characterization of such films. 

Chromium nitride layers (fabricated by, e.g. cathodic arc plasma deposition) are interesting because of their corrosion properties as well as because of their excellent adhesion properties and fine-grained structure. They are applied for die-casting moulds where excellent edge properties are necessary [115,116] some of these layer can have a multiphase character composed of Cr(N), Cr2N, and CrNi t [117]. Sputter deposited ternary chromium nitrides such as Cr fMe (N with Me = Ti, Nb, Mo, and W additions and with grain sizes of up to 25 nm have been found [118] to show either a hardness minimum (Me = Mo, Ti) or a maximum of up to 27GPa (Me-W, Nb). 

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