Parylene layer

Deposit and Pattern Photoresist 1 Form Upper Parylene Layer... 

Xie et al. [20] reported the fabrication chip for pumps and an electrospray nozzle. The process used to fabricate the electrochemical pump chips with electrospray nozzle is shown in Fig. 2.11. A 1.5 xm layer of Si02 was grown on the surface of a 4 inch silicon wafer by thermal oxidation. The front side oxide layer was patterned and removed with buffered FIF. XeF2 gaseous etching was used to roughen the silicon surface in order to promote the adhesion between subsequent layers and the substrate. The first 4.5 p,m parylene layer was deposited. 

A 5.5 (xm photoresist layer was patterned as the sacrificial layer, followed by the deposition of a second 4.5 p,m parylene layer. The parylene/photoresist/ parylene sandwich structure formed the electrospray nozzle and channel when the photoresist was subsequently dissolved. A 1500 A sputtered aluminum layer was used as a mask for parylene etching to define the shape of the nozzle. Aluminum was removed by a wet etching process. After SU-8 developing, wafers were left inside the SU-8 developer for 2 days to release the photoresist. A serpentine channel (250 pan x 500 pm x 15 mm) extending from the junction of pump channels to the edge of the chip was patterned in the SU-8 layer. Platinum/titanium lines spaced 200 pm apart were patterned under the channel after the electrode deposition step. 

Parylene layer on silicon chips is patterned with micron-sized features... 

Peel off parylene layer to reveal lipid pattern... 

Fig. 3. AFM image (3x3 pm) of thin 3 nm pentacene layer grown at 30°C on parylene layer.

The process for the thennal sensor network is as follows. Organic diodes, to be used as sheet-type thermal sensors, are manufactured on an ITO-coated PEN film. A 30-mn thick p-type semiconductor of copper phthalocyanine (CuPc) and a 50-nm thick n-type semiconductor of 3,4,9,10-perylene-tetracarboxylic-diimide (PTCDI) are deposited by vacuum sublimation. A 150-mn thick gold film is then deposited to form cathode electrodes having an area of 0.19 mm. The film with the organic diodes is coated with a 2-pm thick parylene layer and the electronic interconnections are made by the method similar to that mentioned before. The diode film is also mechanically processed to form net-shaped structures. Finally, to complete the thermal sensor network, we laminated the transistor and diode net films together with silver paste patterned by a microdispenser. This is shown in Figure 6.3.11. 

Oepositting Parylene layer Applying cotr essive strain... 

An exp erimental verification of the above concept is shown in Figure 3. f 6. The EWOD electrode is attached to the vertical wall and prepared as follows A DuPont Pyralux flexible Cu product with an 18-pm Cu layer is coated with a 2.5-pm parylene layer. To make the surface hydrophobic, a thin layer (-200 nm) of Teflon AF is dip-coated on the parylene layer. The... 

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