Silicon Wafer Polishing

In the manufacture of the amazing computer chips which have become an integral part of our lives, the first 

It should be noted that the polishing mechanism is not just simply abrasive polishing but includes a chemical reaction component also. Alkali stabilized colloidal silica is used and it can be shown that the polishing rate increases with the pH of the sol. This is thought to indicate that the alkali reacts with the silicon to form an alkaline silicate at the surface and that one function of the colloidal silica is to remove the silicate layer so that fresh surface can be exposed. 

We have run experiments where only high pH water is supplied in the polishing machine and shown that without the presence of some colloidal silica, the removal rate goes to nil. This would imply that the aUcaU silicate salts from a somewhat protective skin over the siUcon surface. Likewise, the lower the pH, the lower the removal rate. One further proof that a chemical reaction is involved is the 

Pressure applied to wafer in carrier. The carrier is not shown here. 

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The steam reformer is a serpentine channel with a channel width of 1000 fim and depth of 230 fim (Figure 15). Four reformers were fabricated per single 100 mm silicon wafer polished on both sides. In the procedure employed to fabricate the reactors, plasma enhanced chemical vapor deposition (PECVD) was used to deposit silicon nitride, an etch stop for a silicon wet etch later in the process, on both sides of the wafer. Next, the desired pattern was transferred to the back of the wafer using photolithography, and the silicon nitride was plasma etched. Potassium hydroxide was then used to etch the exposed silicon to the desired depth. Copper, approximately 33 nm thick, which was used as the reforming catalyst, was then deposited by sputter deposition. The reactor inlet was made by etching a 1 mm hole into the end... 

The first CMP tools, based on rotational platen silicon wafer polishing tools, had low throughput values (10 to 18 wfr/hr). Since the implementation of these first-generation tools for polishing, CMP tool design has... 

Aside from the basic approach to polishing, the most critical component of a CMP tool is the wafer earrier. As with CMP tools, wafer carriers have evolved from roots in lens grinding and in the silicon wafer polishing industries to meet requirements specific to polishing silicon-based integrated circuits. 

IR spectra were obtained on a Model 10MX Nicolet Fourier Transform infrared spectrometer. IR films were spin-coated from polymer solutions in chlorobenzene on either KBr discs or silicon wafers polished on both sides. The samples were baked in vacuum at 90 C for at least 1 hour to ensure solvent removal. Film thicknesses were approximately 1 jtm, sufficient to remove interference fringe effects from the spectra. 

Kang et al. [6] studied the effect of slurry pH during polishing of silicon wafer and polycrystalline silicon films using abrasive-free and silica slurries to understand and compare the polishing mechanism of sUicon. They noticed that the poly-Si CMP process was strongly influenced by mechanical factors however, bare silicon wafer polishing was influenced more by chemical effects. 

Silicon wafer has been extensively used in the semiconductor industry. CMP of silicon is one of the key technologies to obtain a smooth, defect-free, and high reflecting silicon surfaces in microelectronic device patterning. Silicon surface qualities have a direct effect on physical properties, such as breakdown point, interface state, and minority carrier lifetime, etc. Cook et al. [54] considered the chemical processes involved in the polishing of glass and extended it to the polishing of silicon wafer. They presented the chemical process which occurs by the interaction of the silicon layer and the... 

Graf, D., Schnegg, A., Schmolke, R. et al., Morphology and Chemical Composition of Polishing Silicon Wafer Surfaces, Electrochemical Society Proceedings, Vol. 96-22,2000, pp. 186-196. 

Zhao, Y. W. and Chang, L., AMicro-Contact, and Wear Model for Chemical-Mechanical Polishing of Silicon Wafers, Wear, Vol. 252,2002, pp. 220-226. 

When classifying chemical products, Seider et al. [3] identify three categories (1) basic chemicals (commodity and specialty chemicals, bio-materials, and polymeric materials) (2) industrial chemicals (films, fibers, paper,. ..) and (3) configured consumer products (dialysis devices, post-it notes, transparencies, drug delivery patches,. ..). In the manufacture of epitaxial silicon wafers, a thin film of crystalline silicon is often deposited on a polished crystalline silicon... 

Using a 260/wafer sales price for epitaxial silicon wafers and the United States MACRS tax-basis depreciation schedule, the investor s rate of return (IRR) is 18.3%. In addition, the return on investment (ROI) is 25.3%. These measures increase significantly with small changes in sales price for example, at 273/wafer, the IRR is 29.9%. Note that the economic analysis is somewhat shielded from variations in the price of epitaxial wafers because it is strongly linked to the price of the incoming polished wafers. In other words, the key metric of interest is the value added to the wafer by the epitaxial film deposition. 

Polishing uses abrasive compounds and mechanical action to remove contaminants. Although used extensively in preparing glass substrates for chromium masks and in obtaining the desired flatness of silicon wafers, it is seldom, if ever, used once the silicon wafer enters a process sequence. 

Silicon is a Group 14 (IV) element of the Periodic Table. This column includes C, Si, Ge, Sn, and Pb and displays a remarkable transition from insulating to metallic behavior with increasing atomic weight. Carbon, in the form of diamond, is a transparent insulator, whereas tin and lead are metals in fact, they are superconductors. Silicon and germanium are semiconductors, ie, they look metallic, so that a polished silicon wafer is a reasonable gray-toned mirror, but they conduct poody. Traditionally, semiconductors have been defined as materials whose resistance rises with decreasing temperature, unlike metals whose resistance falls. 

D) Silicon wafers, 4 diameter (optically polished, single crystal). 

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