Transistors fabricating

L First manufacturing use of chemically amplified resists Plasma-developed resist first described X-ray proximity lithography demonstrated Bis-azide rubber resists introduced DNO-novolac resist for microelectronics introduced Photoresist technology first applied to transistor fabrication DNO-novolac resist patented by Kalle... 

Nomura, K. Ohta, H. Ueda, K. Kamiya, T. Hirano, M. Hosono, H. 2003. Thin-film transistor fabricated in single-crystalline transparent oxide semiconductor. Science 300 1269-1273. 

Kawase,T. Sirringhaus, H. Friend, R. H. Shimoda,T. 2000. All-polymer thin film transistors fabricated by high-resolution ink-jet printing. Tech. Digest of IEDM. pp. 623-626. 

Ridley, B. A. Nivi, B. Jacobson, J. M. 1999. All-inorganic field effect transistors fabricated by printing. Science 286 746-749. 

Figure 10.13. (a) SEM image of ZnO nanorods coated with octylamine. Scale bar, 200 nm. (b) Uniform nanorod film fabricated by spin coating of ZnO nanorods. Scale bar, 500 nm. The nanorods assemble into domains with nematic ordering, (c) Saturated transfer characteristics for a thin-film transistor fabricated by spin coating of ZnO nanorods with different ligands octylamine (solid line), butylamine (dashed line). Vi = 60V. (d) Output characteristics of a spin-coated device made from octylamine-stabilized ZnO nanorods.The device structure is shown in the inset in (c). Reproduced from Ref. 83, Copyright 2006, with permission from the American Chemical Society. 

Figure 12.9. Micrographs of a cross section of a three-layer construction (source/ dielectric/gate) for a transistor fabricated by graphic arts printing technologies.

Bao, Z. Feng, Y. Dodabalapur, A. Raju, V. Lovinger, A. 1997. High-performance plastic transistors fabricated by printing techniques. Chem. Mater. 

Cui, T. Liang, G. Varahramyan, K. 2003. An organic poly(3,4-ethylenedioxythio-phene) field-effect transistor fabricated by spin coating and reactive ion etching. IEEE Trans. Electron Dev. 50 1419-1422. 

The conductance of MWCNTs is quantized. The experimental setup to measure the conducting properties involved the replacement of an STM tip with a nanotube fiber that was lowered into a liquid metal to establish the electrical contact. The conductance value observed corresponded to one unit of quantum conductance (Go = 2e /h = 12.9 kQ ). This value may reflect the conductance of the external tube because, for energetic reasons, the different layers are electrically insulated [150]. Finally, the conductance of semiconductor nanotubes depends on the voltage applied to the gate electrode their band gap is a function of their diameter and helicity [145] and the ON/OFF ratio of the transistors fabricated with semiconductor nanotubes is typically 10 at room temperature and can be as high as 10 at... 

Schorner, R., et al., Enhanced Channel Mobility of 4H-SiC Metal-Oxide-Semiconductor Transistors Fabricated with Standard Polycrystalline Silicon Technology and Gate-Oxide Nitridation, Applied Physics Letters, Vol. 80, No. 22, June 3, 2002, p. 176. 

Pentacene routinely yields field-effect transistor (FET) devices with reliable hole mobility of 1 cm2 V-1 s 1 [6], with mobility > 3 cm2 V-1 s-1 reported for thin-film devices on polymer gate dielectrics [9]. For transistors fabricated on single crystals of pentacene, the measured mobility approaches 60 cm2 V-1 s 1 [10]. 

Thin-film Transistor Fabrication by Digital Lithography... 

K. E. and Street, R.A. (2002) Organic polymeric thin-film transistors fabricated by... 

Nunes et al. wanted to find out whether transistors made with PHS and other organic dielectrics could show the excellent performance already reported for the pentacene transistors. This will help to determine whether other polymers with improved characteristics can be found. They investigated the effect of PHS on important device characteristics, threshold voltage and subthreshold slope. The dielectrics they investigated and their dielectric properties are shown in Fig. 6.22. Measured mobilities in transistors fabricated... 

As discussed above, the driver for many printed electronics applications is the printed transistor. The printed transistor is essentially a thin film transistor fabricated using printable materials. In other words, in its ultimate implementation, all three major material components of the printed transistor, i.e., the conductive electrodes, the insulating gate dielectric, and the semiconducting channel material, are printed. 

At this point, it is appropriate to review the various process integration issues that must be considered during printed transistor fabrication. These issues in turn impact material selection, which is covered in a separate section. 

FIGURE 20.13 Metal gate transistors fabricated using CMP to enable exposure of the top of NMOS and PMOS gates (independently) followed by FUSI reaction of gates to form silicided metal gates (from Ref 12). 

FIGURE 20.16 In a second 3D fabrication scheme, CMP is used to smooth the wafer surface after lateral epitaxial growth. After a first layer of transistor fabrication, a second layer of device quality Si is grown from seed holes in Si02 down to the original wafer surface. This process allows for transistor fabrication on multiple levels of the wafer surface (from Ref. 15). 

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