IC device fabrication

The use of optical hthography in silicon IC device fabrication dates back to the mid-1950s when Andrus employed it at Bell Laboratories to define precise... 

The fourth link between chemistry and lithography concerns the principles governing the chemical transformations utilized in process-integration schemes that are part of the implementation of lithography in IC device fabrication. This theme, discussed in Chapter 16, explores how lithography is used to define and pattern the various front end of lithography (FEOL) and back end of lithography (BEOL) layers of a state-of-the-art Advanced Micro Devices (AMD) microprocessor based on a complementary metal-oxide semiconductor (CMOS) device. 

It is expected that the geometrical dimensions of IC devices will continue to decrease through the use of electron beam and x-ray lithography. Analysis of these small geometries presents additional challenges since a tradeoff exists between analysis area, and detection limits for the microbeam analysis techniques, AES and SIMS. The other surface analysis techniques of XPS and RBS already have very limited spatial resolution with respect to the current geometrical dimensions of IC s. The fabrication of denser and more complicated IC s also increases the value of each wafer which increases the need for additional process characterization and control. The increased application of surface analysis to semiconductor problems will provide a better understanding of these processes and will stimulate the further development of instrumental surface analysis techniques. 

The IC is fabricated by a series of lithographic processes similar to that described in the previous section. Each individual step constitutes a level in the device, the final level being a metalization pattern to interconnect the circuit elements that have been fiibricated in the surface of the silicon wafer. The completed wafer is then diced, a step that involves cutting the wafer, typically with a diamond saw, to separate the individual IC chips. The next step is to package the chips in some way, attach the devices along with other components to the printed wiring board (PWB), and interconnect them to produce the completed circuit board. 

Magnetic bubble devices are high dens ity ynemory devices and use stored magnetic domains as storage areas. The key features of these devices are their simplicity of fabrication and use of Ni/Fe as device elements. The passivation of these devices is similar to corresponding IC devices except in the following ... 

Although photoresists remain the dominant resists used in the fabrication of all kinds of IC devices, electron-beam resists are widely used in the fabrication of photomasks and x-ray masks, as well as in niche applications in the fabrication of exploratory research devices. 

Masks and reticles contain the blueprints or the patterns of the circuit elements used as templates in the fabrication of IC devices. They provide the templates of the circuit elements from which numerous replications, perhaps numbering in the millions, are made. The object of lithography is to transfer these blueprints to semiconducting substrates such as silicon wafers. 

Water immersion ArF lithography was deployed for the first time in large-scale fabrication of critical layers of IC devices at the 45-nm technology node in 2008,... 

Electron-beam lithography (EBL) refers to a lithographic patterning technique in which a focused beam of electrons is used to expose and pattern resist-coated semiconductor substrates as part of a number of steps used in the fabrication of IC devices. Its introduction into IC fabrication dates back to 1957. Today, electron-beam lithography is used primarily in fabrication of masks used in optical lithography and x-ray lithography. It is also used in low-volume fabrication of exploratory IC device layers with extremely small features it has also found application in nanotechnology research. 

Figure 16.1 shows a layout of the various process modules used in the fabrication of IC devices in a typical semiconductor wafer fabrication facility. As discussed in Chapter 11, the lithography module plays a very critical role in the fabrication of these devices. 

Given that CMOS technology is the most popular process technology for making ICs, we will use it to illustrate how IC devices are made. Specifically, we illustrate in the following sections the fabrication process steps of a 90-nm CMOS microprocessor device based on copper interconnect technology, with particular emphasis on how lithography is implemented in the entire process flow. 

The manufacture of the CMOS microprocessor, just like every other IC device, comprises the three phases of design, fabrication, and testing shown in Fig. 16.4. The first phase is the design phase, comprising the definition, circuit design and analysis, layout synthesis, verification, and tape-out of the microprocessor from the design house. This phase relies heavily on CAD software. 

The fabrication of IC devices requires that the n- and p-type regions be formed selectively in the surface of the wafer. Silicon dioxide, silicon nitride, polysilicon, and especially resists are typically used to mask (or cover) specific areas of the wafer surface to prevent them from being penetrated by impurities during ion implantation or diffusion. The wafer areas to be implanted or deposited with conducting metals are defined with the aid of lithography. 

The anisotropic wet etching of silicon is a unique fabrication process in the MEMS field. The need to develop new processes to fabricate functional 3D microstructures in various materials is urgent for progress in microfluidic systems, microsensors, micro-actuators, and microinstrumentation. At present, to integrate surface micromachined devices and standard IC devices with bulk micromachined structures to demonstrate a new functional MEMS application is still a challenge for researchers who work in this field. The cooperation of multidisciplinary researchers will be required to develop miniature systems with the most appropriate building philosophy and the best operation performance. 

Nanophotonics, proposed by the author in 1993 [1-3], is a novel optical technology that utilizes the optical near-field. The optical near-field is the dressed photons that mediate the interaction between nanometric particles located in close proximity to each other. Nanophotonics allows the realization of qualitative innovations in photonic devices, fabrication techniques, and systems by utilizing novel functions and phenomena enabled by optical near-field interactions that would otherwise be impossible if only conventional propagating light were used. In this sense, the principles and concepts of nanophotonics are completely different from those of conventional wave-optical technology, encompassing photonic crystals, plasmon-ics, metamaterials, and silicon photonics. This review describes these differences and shows examples of such qualitative innovations. 

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