CMOS technology

Gate oxide dielectrics are a cmcial element in the down-scaling of n- and -channel metal-oxide semiconductor field-effect transistors (MOSEETs) in CMOS technology. Ultrathin dielectric films are required, and the 12.0-nm thick layers are expected to shrink to 6.0 nm by the year 2000 (2). Gate dielectrics have been made by growing thermal oxides, whereas development has turned to the use of oxide/nitride/oxide (ONO) sandwich stmctures, or to oxynitrides, SiO N. Oxynitrides are formed by growing thermal oxides in the presence of a nitrogen source such as ammonia or nitrous oxide, N2O. Oxidation and nitridation are also performed in rapid thermal processors (RTP), which reduce the temperature exposure of a substrate. 

The lower power dissipation associated with CMOS technology makes it attractive to crowd as many FETs as possible on a chip. The remarkable increase in the number of FETs per chip has been the result of shrinking FET sizes. If the gate length, E, and width, lU, are decreased by a factor of two. 

Niclass, C., Gersbach, M., Henderson, R., Grant, L. and Charbon, E. (2007). A single photon avalanche diode implemented in 130-nm CMOS technology. IEEE J. Sel. Top. Quant. Electron 13, 863-9. 

Fig. 2.2. Cross-sectional schematic of a monolithic sensor system in CMOS technology...

The first device is a circular microhotplate (Sect. 4.1). One important guideline was to implement the microhotplate in CMOS technology with a minimum of post-CMOS micromachining steps. Additionally the hotplate had to be optimized for drop-coating with nano crystalline tin-oxide layers. This microhotplate was cointegrated with circuitry, and the respective monolithic sensor system will be discussed in Sect. 5.1. 

In this equation UA, UB, and UC are a set of parameters from the foundry for the respective CMOS technology. V"sbx denotes the potential difference between source and bulk, which is zero in the case of the MOSFET-heater. Finally Cx represents the thickness of the gate oxide. 

D. Barrettino, M. Graf, M. Zimmermann, A. Hierlemann, and H. Baltes. A Smart Single-chip Microhotplate-based Chemical Sensor System in CMOS Technology , Proc. IEEE International Symposium on Circuits and Systems (ISCAS), Phoenix, AZ, USA (2002) Vol. 2, 157-160. 

S. Hahn. Sn02 thick film sensors at ultimate limits Performance at low O2 and H2O concentrations Size reduction by CMOS technology, Ph.D. thesis. University of Tubingen, Germany (2002). 

M. Graf, R. Jurischka, D. Barrettino, and A. Hierlemann. 3D nonlinear modeling of microhotplates in CMOS technology for use as metal-oxide-based gas sensors . Journal of Micromechanics and Micro engineering 15 (2005), 190-200. 

Integrated Chemical Microsensor Systems in CMOS Technology... 

D.S. Tezcan, S. Eminoglu and T. Akin, A low-cost uncooled infrared microbolometer detector in standard CMOS technology, IEEE Trans. Electron. Dev., 50(2), 494-502 (2003). 

As an alternative, top gated devices contacted with TiC show ambipolar behavior and better stability [167, 168]. Ambipolar transistors, however, cannot be used to reproduce the current CMOS technology where both p-type and n-type transistors are used because the combination of the two has superior performance and lower power consumption than devices built with only one type of transistor. An alternative solution was recently presented and consists of selectively applying negative or positive gate voltages to CNT ambipolar transistors, which make them behave as p-type or n-type respectively [169]. 

---