Layout synthesis

In this chapter, we proposed a complete layout design framework for the 2.5-D integration scheme. This framework consists of layout synthesis tools developed to fit the requirements of different design styles at major VLSI physical design stages. 

In the previous chapter, we briefly outlined our 2.5-D layout synthesis framework. In this chapter, the 2.5-D layout tools are applied on floorplan level designs. We will introduce our floorplanning algorithms along with the design case studies in this chapter. 

K. Kozminski. Benchmarks for layout synthesis. In Proc. Design Automation Conf., 1991, pp. 265-270. 

In the work reported in this book, a prototyping layout synthesis framework for 2.5-D integrated VLSI systems has been constructed. To provide 2.5-D specific optimization, the existing tools have to be extended with new features and at the same time new tools have to be developed. 

The manufacture of the CMOS microprocessor, just like every other IC device, comprises the three phases of design, fabrication, and testing shown in Fig. 16.4. The first phase is the design phase, comprising the definition, circuit design and analysis, layout synthesis, verification, and tape-out of the microprocessor from the design house. This phase relies heavily on CAD software. 

J. Madsen. Layout synthesis using compiled cells, PhD Thesis, Department of Computer Science, Technical University of Denmark, 1992. 

DESIGN AUTOMATION FOR TIMING-DRIVEN LAYOUT SYNTHESIS, S. S. Sapatnekar, S. Kang... 

Layout synthesis converts an interconnected set of cells, which describes the structure (topology) of a design, into the exact physical geometry (layout) of the design. It involves both the placement of the cells as well as their connection (routing). Layout synthesis has been in practical use for over two decades. 

Eindhoven University of Technology s ( lindhoven Silicon Ilompiler) system performs scheduling and data path synthesis (EASY — indhoven Architecture Synthesis), logic synthesis, and layout synthesis. Several synthesis teclmiques have been explored. 

Algorithms and Techniques for VLSI Layout Synthesis. D. Hill, D. Shugard, J. Fishburn, K. Keutzer. 

Technology for component specification and generation (component server) must be developed by combining sequential, logic, and layout synthesis. 

WuGa90] C-H.A. Wu, D. Gajski, Partioning Algorithms for Layout Synthesis from Register-Transfer Netlists, Proc. ICCAD, 1990. 

M.Ishikawa, et al., Automatic Layout Synthesis for FIR Filters Using a Silicon Compiler , Proc. ISC AS 90,2588-2589 1990. 

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