Dielectric materials interconnects

The scarcity of efficacious insulation candidates prompted the Semiconductor Industry Association to identify the criticality of low-k dielectric material development. Thus, in June 1995, Dow made a business commitment to invent a new material specifically tailored for the interconnect application. Specific performance targets were defined based on interactions with the industry, experience gained through Dow s earlier benzocyclobutene-based systems, finite element analysis of the anticipated interconnect structures, and principles of material sciences. 

An HgCdTe imager chip 130 and Si read-out chips 140 are mounted on a substrate. The imager chip is connected to the read-out chips by an interconnect structure ISO in which a layer 152 of dielectric material is bonded to the chips and has interconnecting conductors disposed thereon and extending through via holes therein into ohmic contact with contact pads of the chips. A flexible portion in the structure enables the read-out and the imager chips to be disposed in different planes to provide a compact structure. 

Typical nanopore materials are porous oxides or polymers that have an ultra-low dielectric constant (k < 2). Ultra-low k is significant in producing highspeed electronic devices such as the interconnect structure shown in Figure 13.8. Si02, which has a dielectric constant of about 4, is currently used as a dielectric material between interconnects in most microelectronic devices. When the packing density between multilevel interconnects increases, a low... 

The dielectric layers should be thick to achieve low interconnect capacitance (or high characteristic impedance), which reduces the power consumption of driver circuits and the RC delay of the Interconnect. Finally, the dielectric material should have a low dielectric constant (e ) to minimize the propagation delay (which is limited by the speed of light in the dielectric), the interconnect capacitance and the crosstalk between signal lines. 

In addition to the construction of a multilevel interconnect network, the semiconductor industry also improves the performance of IC chips by incorporating low-resistivity metal wiring such as copper and new dielectric materials with lower k constant (see Section 1.3.1 for details). The added benefit of using low-fc dielectric materials includes a reduction in the crosstalk [29-31] and power dissipation [29-33]. The key challenge for the implementation of low-fc materials is related to their intrinsic weak mechanical properties. Furthermore, in order to achieve a k value below 2.2, practically all materials are made with pores that exacerbate mechanical stability issue [29-33]. This is a particular concern for the CMP community as the operation invariably involves mechanical stress and shear force. In addition, practically all low-fc dielectric materials are hydrophobic in nature. Lfpon exposure to moisture or wetness, the dielectric constant tends to increase. Therefore, unlike silicon-dioxide-based dielectric, the effective k constant may change after CMP. To... 

The two key components in interconnect delays include the inherent resistance (R) of the metal lines and the capacitance (C) of the dielectric material in between the lines. The so-called RC delay is defined as the time required for the voltage at one end of a metal line to reach 63 % of its final value when a step input is presented at the other end of the line [18] ... 

As can be deduced from the frequent mention of dielectric constants in sections about properties of CVD polymers in this review, a majority of CVD polymers are targeted towards low dielectric constant interconnect applications in ultralarge scale integrated circuits (ULSI). The urgent need to develop a suitable material and process for this application can be sensed by the sheer number of papers published in this area. For an in-depth understanding, the reader is referred to some excellent review articles in literature. "" ... 

Diffusion barrier layers are an integral part of the fabrication of copper interconnects (Figs. 3 and 4). Barrier films isolate (encapsulate) Cu interconnects from adjacent dielectric materials. The diffusion barriers most studied to date are Ti, and TiN. ... 

Aromatic polyimides have gained wide popularity as dielectric materials in a variety of applications in the manufacturing of electronic circuits due to their thermal, mechanical and electrical properties. Most notable among these applications are as interlayer dielectrics in multilevel VLSI circuits and in multilevel interconnects, as well as in the packaging of integrated circuits. 

Figure 1.10 (a) Capacitive delays from interconnect geometry and (b) dielectric material fc-values.19... 

Copper is going to replace aluminum as the material of choice for semiconductor interconnects due to its low electrical resistance and high electromigration resistance (1-4). An inlaid interconnect is used for copper metallization in which the insulating dielectric material is deposited first, trenches and vias are formed by patterning and selective dielectric etching, and then diffusion barrier and copper seed layer are deposited into the trenches and vias (5). 

PECVD silicon oxide films are used as a dielectric material for isolation of aluminum interconnections due to the low deposition temperature required (Al, m.p. =... 

Okoroanyanwu and R. Subramanian, Interconnect structure with silicon containing alicyclic polymers and low k dielectric materials and method of making same with single and dual damascene techniques, U.S. Patent No. 6,475,904 (2002). 

In the case of device applications, the filling material is some form of dielectric material, such as oxides, polymers, or polycrystalline silicon. (Metal filled trenches could serve as buried interconnecting device lines). As suggested previously, generally two types of trenches may have to be filled up - narrow ones for device isolation, and wider ones to benefit other circuit functions. The process requirements are somewhat different for each. However, independent of the trench width, the initial processing is the same. 

However, introduction of new dielectric materials with lower and lower k values at each technology node proved to be extremely difficult. Since these materials have high porosity, mechanical integrity of the interconnect strucmre degrades as k values become smaller. Figure 2.4 summarizes the issues associated with the integration of porous SiCOH materials. 

This can be accomplished by using materials between the metal lines that have a lower dielectric constant (also referred to as the k-value). Copper interconnect was first introduced with silicon oxide as the dielectric material, with a dielectric constant of about 4.0 (the value depends on the specifics of the deposition process, such as the precursor used, the temperature of deposition, plasma parameters, etc.). Substitution of some of oxygen atoms with fluorine in fluorinated silicon glass decreased the dielectric constant (with values about 3.7, depending on the fluorine content and process parameters). It should be noted that the incorporation of fluorine was not an unalloyed benefit, since the addition of greater amounts of fluorine can affect the moisture stability of the F-doped oxide films, and the F can attack Ta-based diffusion barriers. 

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