VLSI circuits

Dielectric Film Deposition. Dielectric films are found in all VLSI circuits to provide insulation between conducting layers, as diffusion and ion implantation (qv) masks, for diffusion from doped oxides, to cap doped films to prevent outdiffusion, and for passivating devices as a measure of protection against external contamination, moisture, and scratches. Properties that define the nature and function of dielectric films are the dielectric constant, the process temperature, and specific fabrication characteristics such as step coverage, gap-filling capabihties, density stress, contamination, thickness uniformity, deposition rate, and moisture resistance (2). Several processes are used to deposit dielectric films including atmospheric pressure CVD (APCVD), low pressure CVD (LPCVD), or plasma-enhanced CVD (PECVD) (see Plasma technology). 

Ozaki, K. Sekiguchi, H. Wakana, S. Goto, Y. Umehara, Y. Matsumoto, J., Novel optical probing system with submicron spatial resolution for internal diagnosis of VLSI circuits, Proc. Int. Test. Conf. 1996, 269 275... 

High-Level Test Synthesis of Digital VLSI Circuits, Mike Tien-Chien Lee... 

Multilevel structures consisting of alternating metal and dielectric layers are necessary to achieve Interconnection in high density or VLSI circuits using either MOS or bipolar technology. 

Gargini, P., Tungsten barrier eliminates VLSI circuit shorts. Ind. Res. ... 

One of the most widely used materials for the fabrication of modern VLSI circuits is polycrystalline silicon, commonly referred to as polysilicon. It is used for the gate electrode in metal oxide semiconductor (MOS) devices, for the fabrication of high value resistors, for diffusion sources to form shallow junctions, for conduction lines, and for ensuring ohmic contact between crystalline silicon substrates and overlying metallization structures. 

One underlying reason for the Japanese success was its impressive commercializing of a new memory chip, the DRAM (Dynamic Random Access Memory), initially introduced by Intel in 1971. As its New Series Project was being fulfilled, MITI formed a new project, the Very Large-Scale Integrated (VLSI) circuit, which would coordinate the activities of the four major computer companies in commercializing the DRAM memory chip. 

Ismail YI, Friedman EG et al (2000) Effects of inductance on the propagation delay and repeater insertion in VLSI circuits. IEEE Trans Very Large Scale Integr (VLSI) Syst 8 195-206... 

Aromatic polyimides have gained wide popularity as dielectric materials in a variety of applications in the manufacturing of electronic circuits due to their thermal, mechanical and electrical properties. Most notable among these applications are as interlayer dielectrics in multilevel VLSI circuits and in multilevel interconnects, as well as in the packaging of integrated circuits. 

Reactive ion etching is now very widely used for delineating fine patterns in the fabrication of VLSI circuits. Recently, fluorine atoms produced in CF plasma have been used in the etching of Si wafers, generating SiF2 (8). As an alternative dry etching approach, a photo-excited etching has been reported by... 

The fabrication of LSI circuits, and of VLSI circuits in particular, requires patterns of micron and submicron dimensions, and consequently polymer resists with a high degree of resolution (1). So far the most frequently used positive electron resist has been poly(methyl methacrylate) (PMMA), which affords a high resolution power together with a relatively good thermal stability (2-4) A serious limitation of PMMA with respect to the efficiency of the electron lithography system is its low sensitivity to electron irradiation ( 10-5 - 10 4c/cm2). For the preparation... 

D. E. Quinn, in Digest of Technical Papers, 1992 Symposium on VLSI Circuits, 1992, pp. 34-35, IEEE. 

W. Maly. Computer-Aided Design for VLSI Circuit Manufacturability. Proceedings of IEEE, Vol. 78, Feb. 1990, pp. 356 - 390. 

Abstract This chapter covers the placement solutions for 2.5-D/3-D integrated circuits. Based on a partition technique, our placement techniques could handle VLSI circuits consisting of both standard cells and macros. The detailed result analysis justifies the potential of the 2.5-D integration approach to improve system performance and lower interconnect power consumption. 

The processes of planarization is vital for the development of multilevel structures in VLSI circuits. To minimize interconnection resistance and conserve chip area, multilevel metallization schemes are being developed in which the interconnects run in three dimensions. Figure 5-4 shows a schematic of the multilevel metallization made possible by planarization. 

Routing Congestion in VLSI Circuits Estimation and Optimization Prashant Saxena, Rupesh S. Shelar, Sachin Sapatnekar ISBN 978-0-387-30037-5... 

Bouwer, G. Bouwhuis, H. Van Heek, and S. Wittkoek, The sihcon repeater, Philips Tech. Rev. 37(11/12), 330 333 S. Wittkoek, Optical aspects of the silicon repeater, Philips Tech. Rev. 41, 268 (1983/84) H. Binder and M. Lacomhat, Step and repeat projection printing for VLSI circuit fahrication, IEEE Trans. Electron Dev. ED-26(4), 698 704 (1979) J. Wilcyncski, Optical step and repeat camera with dark field automatic alignment, J. Vac. Sci. Technol. 16,1929 1933 (1979). 

Koickal, T.J., Hamilton, A., Tan, S.L., Covington, J.A., Gardner, J.W., Pearce, T.C. Analog VLSI Circuit Implementation of an Adaptive Neuromorphic Olfaction Chip. IEEE Circuits and Systems 54, 60-73 (2007)... 

FIGURE 16.2 An example of a very large-scale integrated (VLSI) circuit chip manufactured by IBM. (Reproduced with permission from Hoechst High Chem. Magazine, 1989). 

Matteo Sonza Reorda was bom in Ivrea, Italy, on November 30, 1961. He received the M.S. degree in Electronics and the Ph.D. degree in Computer Science from the Politecnico di Torino, Italy, in 1986 and 1990, respectively. Since 1990, he has been an Assistant Professor with the Department of Computer Science and Automation, Politecnico di Torino. His research interests include CAD for VLSI circuits with particular emphasis on testing and layout, evolutionary computation, and parallel algorithms. 

H. Nelis and E. Deprettere. Automatic design and partitioning of systolic/wavefront arrays for VLSI. Circuits, Systems and Signal Processing, 7, number 2, pages 235-252, 1988. 

G. De Micheli. Synthesis of control systems. In G. De Micheli, A. Sangiovanni-Vincentelli, and P. Antognetti, editors, Design systems for VLSI Circuits Logic Synthesis and Silicon Compilation Martinus Nijhoff, pages 327-364, 1987. 

HOT-CARRIER RELIABILITY OF MOS VLSI CIRCUITS. Y. Ublebici, S. Kang ISBN 0-7923-9352-X... 

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