Silicon oxide deposition

Fujimo, K., Nishimoto, Y., Tokumasu, N., andMaeda, K., Doped Silicon Oxide Deposition by Atmospheric Pressure and Low Temperature CVD using Tetraethoxysilane and Ozone, J. Electrochem. Soc., 138(10) (Oct. 1991)... 

These electrochemical processes must be eliminated or the rate of reaction must be reduced to prevent failure of the laser in the presence of moisture over the desired lifetime of the device. Facet coating films that eliminate or reduce the oxidation processes have been developed recently. Key properties of such films are good adhesion, absence of voids, low water absorption, and chemical resistance to water. One example of such a film is silicon oxide deposited by a molecular beam deposition process (Chand et al., 1996). 

Thin oxide films may be prepared by substrate oxidation or by vapour deposition onto a suitable substrate. An example of the fomrer method is the preparation of silicon oxide thin-films by oxidation of a silicon wafer. In general, however, the thickness and stoichiometry of a film prepared by this method are difficult to control. 

Conventional electronic devices are made on silicon wafers. The fabrication of a silicon MISFET starts with the diffusion (or implantation) of the source and drain, followed by the growing of the insulating layer, usually thermally grown silicon oxide, and ends with the deposition of the metal electrodes. In TFTs, the semiconductor is not a bulk material, but a thin film, so that the device presents an inverted architecture. It is built on an appropriate substrate and the deposition of the semiconductor constitutes the last step of the process. TFT structures can be divided into two families (Fig. 14-12). In coplanar devices, all layers are on the same side of the semiconductor. Conversely, in staggered structures gate and source-drain stand on opposing sides of the semiconductor layer. 

While the manifolds were fabricated by a plain molding process, the microchannels substrate fabrication was quite complicated and was achieved by a multistage process. The following main stages were used in the process (1) double side oxidation of a 525 pm (1 0 0) silicon substrate to 1,000 A, (2) single side 1,200 A silicon nitride deposition, (3) silicon nitride channels template opening by reactive... 

Chemical Vapor Deposition- Deposition of silicon oxide films is accomplished by CVD equipment. Either plasma CVD or ozone oxidation is used. Blanket tungsten films are also deposited by CVD equipment to create contact and via plugs. Polysilicon and silicon nitride films are deposited in hot-wall furnaces. TiN diffusion barrier films are deposited by either sputtering or CVD, the latter giving superior step coverage. 

MOSFETT s, and silicon oxide is deposited. The source/drain positions where electrical contact is to be made to the MOSFETs are defined, using the oxide-removal mask and an etch process. For shallow trench isolation, anisotropic silicon etch, thermal oxidation, oxide fill and chemical mechanical leveling are the processes employed. For shallow source/drains formation, ion implantation techniques are still be used. For raised source/drains (as shown in the above diagram) cobalt silicide is being used instead of Ti/TLN silicides. Cobalt metal is deposited and reacted by a rapid thermal treatment to form the silicide. Capacitors were made in 1997 from various oxides and nitrides. The use of tantalmn pentoxide in 1999 has proven superior. Platinum is used as the plate material. 

The reaction channels were made in silicon by several photolithographic steps, followed by potassium hydroxide etching [13,14]. Silicon oxide was thermally grovm over the silicon. Nickel thin films were vapor-deposited. Pyrex was anodically bonded to such a modified micro structured silicon wafer. 

Many theories on the formation mechanisms of PS emerged since then. Beale et al.12 proposed that the material in the PS is depleted of carriers and the presence of a depletion layer is responsible for current localization at pore tips where the field is intensified. Smith et al.13-15 described the morphology of PS based on the hypothesis that the rate of pore growth is limited by diffusion of holes to the growing pore tip. Unagami16 postulated that the formation of PS is promoted by the deposition of a passive silicic acid on the pore walls resulting in the preferential dissolution at the pore tips. Alternatively, Parkhutik et al.17 suggested that a passive film composed of silicon fluoride and silicon oxide is between PS and silicon substrate and that the formation of PS is similar to that of porous alumina. 

A cross-sectional schematic of a monolithic gas sensor system featuring a microhotplate is shown in Fig. 2.2. Its fabrication relies on an industrial CMOS-process with subsequent micromachining steps. Diverse thin-film layers, which can be used for electrical insulation and passivation, are available in the CMOS-process. They are denoted dielectric layers and include several silicon-oxide layers such as the thermal field oxide, the contact oxide and the intermetal oxide as well as a silicon-nitride layer that serves as passivation. All these materials exhibit a characteristically low thermal conductivity, so that a membrane, which consists of only the dielectric layers, provides excellent thermal insulation between the bulk-silicon chip and a heated area. The heated area features a resistive heater, a temperature sensor, and the electrodes that contact the deposited sensitive metal oxide. An additional temperature sensor is integrated close to the circuitry on the bulk chip to monitor the overall chip temperature. The membrane is released by etching away the silicon underneath the dielectric layers. Depending on the micromachining procedure, it is possible to leave a silicon island underneath the heated area. Such an island can serve as a heat spreader and also mechanically stabihzes the membrane. The fabrication process will be explained in more detail in Chap 4. 

Another example is the silicidizing of tantalum, basically an oxidation— reduction reaction. The packing is sodium fluoride and silicon. After deposition, the coating diffuses continuously into the substrate, according to the following reactions ... 

Insulator sputtering is similar to the process described for metal sputtering. The only difference is that the source target is a dielectric film. There is less control of the chemical nature and quality of the film as compared to a CVD deposited film. Common sputtered films include silicon nitride and silicon oxide. 

Fig. 13.20. Optical heterodyne force microscopy (OHFM) and its application to a copper strip of width 500 nm, thickness 350 nm, on a silicon substrate, with subsequent chemical vapour deposition (CVD) of a silicon oxide layer followed by polishing and evaporation of a chromium layer of uniform thickness 100 nm and flatness better than 10 nm (a) amplitude (b) phase 2.5 [im x 2.5 m. Ultrasonic vibration at fi = 4.190 MHz was applied to the cantilever light of wavelength 830 nm was chopped at fo = 4.193 MHz and focused through the tip to a spot of diameter 2 im with incident mean power 0.5 mW the cantilever resonant frequency was 38 kHz. The non-linear tip-sample interaction generates vibrations of the cantilever at the difference frequency f2 — f = 3 kHz (Tomoda et al. 2003).

CVD processing can be used to provide selective deposition on certain areas of a surface. Selective tungsten CVD is used to fill vias or holes selectively through silicon oxide layers in silicon-device technology. In this case, the silicon from the substrate catalyzes the reduction of tungsten hexafluoride, whereas the silicon oxide does not. Selective CVD deposition can also be accomplished using lasers or focused electron beams for local heating. 

When fluorine is deposited onto a silicon oxide surface from a plasma process, it cannot be completely removed even after an extensive period in elevated temperature water. 

Figure 7.16 Left Spreading of a drop of PDMS on a silicon wafer observed with an ellipsometer 19 h after deposition. Redrawn after Ref. [283], On a much smaller scale (right) prewetting layers around droplets of polystyrene on a flat silicon oxide surface are observed. The atomic force microscope image shows an area of (2.5 /um)2 [284].

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