Processing/structure/properties silicon semiconductors

FigyibV 1-12 Processing/structure/properties/performance topic timelines for (a) steels, (b) glass-ceramics, (c) polymer fibers, and (d) silicon semiconductors. 

This concludes the processing/structure/properties/performance commentary for silicon semiconductors. For the most part, the individual components found in the preceding interrelationships are conceptual in nature—that is, they represent the scientific (as opposed to engineering) aspects of materials. A processing/structure/properties/per-formance relational diagram for these materials taken from the materials engineering perspective is presented in Figure 18.38. 

Figure 18.38 Schematic diagram that summarizes the elements of processing, structure, properties, and performance for silicon semiconductors, which includes components of materials engineering.

Processing/Structure/Properties/Performance correlations and summary concept maps for four materials (steels, glass-ceramics, polymer fibers, and silicon semiconductors), which integrate important concepts from chapter to chapter... 

For automotive applications, the various functions require several special material properties. Here, we concentrate on properties of thin films rather than on their production processes. A wide range of publications deal with sensor-specific processes, for example, silicon reactive ion etching (RIE) using the Bosch trench process [2] and sacrificial oxide etching [3, 4]. The details of standard deposition and structuring processes are described in numerous books on semiconductor technology (e.g., [5, 6]), and they are not discussed in depth here. 

The electrical properties of semiconductors can be changed by adding small amounts of other substances. This process is known as doping. In n-type semiconductors, a small number of Group 15 element atoms, such as arsenic, are spread out in a sample of silicon. The arsenic atoms use four of their five valence electrons to bond with surrounding silicon atoms and the fifth electron is delocalised in the structure. This makes the substance a much better electrical conductor than pure silicon. The name n-type is derived from the fact that the doped material has an excess of negative charge. This is shown in Fig. 12.3... 

Dislcxation-free silicon single crystals are the basic material of microelectronics and nanoelectronics. Physical properties of semiconductor silicon are determined by the structural perfection of the crystals grown by the Czochralski and float-zone processes (Huff, 2002). In such crystals during their growth are formed grown-in microdefects. 

Chu, Qin, and Elan applied an SVM classification model for the fault detection and identification of the operation mode in processes with multi-mode operations.They studied the rapid thermal annealing, which is a critical semiconductor process used to stabilize the structure of silicon wafers and to make uniform the physical properties of the whole wafer after ion implantation. A dataset of 1848 batch data was divided into 1000 learning data and 848 test data. Input data for the SVM model were selected with an entropy-based algorithm, and 62 input parameters were used to train three SVM classification models. The system based on SVM is superior to the conventional PCA fault detection method. 

An acid wash removes excess magnesium, leaving the silicon nanostructures behind. By implication the process could be used for artificial structures as well and the versatile semiconductor properties of silicon mean that some interesting nanofabricated devices could result.9... 

Two major improvements in the fabrication of an ion-sensitive FET that avoid most of the tedious polymer encapsulauon process have been reported. Matsuo and his coworkers (4, 37) fabricated a probe-type FET with a three-dimensional silicon nitride passivation layer around most of its surface, as shown in Fig. 2. The probe-type FET has one disadvantage Its fabrication requires a three-dimensional process that is uncommon for semiconductor construction facilities. An alternative approach utilizes a silicon-on-sapphire (SOS) wafer for FET fabrication (38, 39). The structure of a SOS-FET is depicted in Fig. 3. It has an island-like silicon layer on a sapphire substrate, in which an ion-sensitive FET is fabricated. The bare lateral sides do not need encapsulation because of the high insulation property of sapphire. 

The optical properties of porous silicon have given rise to renewed interest in the processes leading to pore formation and the relationship between the structure and characteristic properties of porous layers. Indeed, porous semiconductors may be considered a new class of materials, since pore formation is not limited to silicon and has been observed for a wide range of compound semiconductors. 

---