Semiconductor passivation

Another example of a cold-wall reactor is shown in Fig. 5.9. It uses a hot plate and a conveyor belt for continuous operation at atmospheric pressure. Preheating and cooling zones reduce the possibility of thermal shock. The system is used extensively for high-volume production of silicon-dioxide coatings for semiconductor passivation and interlayer dielectrics. 

On the contrary. Pis synthesized from pyromellitic dianhydride (PMDA) or 3,3, 4,4 -biphenyltetracarboxilic dianhydride (BPDA) with p-phenylene diamine (PDA) in order to form PMDA-PDA and BPDA-PDA, respectively, present a higher thermal stability (Ta=610 °C and 595 °C, respectively) than Pis owning C-O-C ether bonds. Moreover, both appear as better candidates for the wide band gap semiconductor passivation due to their low CTEs (2 ppm/°C and 3-7 ppm/°C, respectively). For instance, PMDA-PDA and BPDA-PDA show internal stresses of -10 MPa (compression) and 5 MPa when they are coated on Si wafers (3 ppm/°C). Thus, BPDA-PDA seems to be, as given by the main thermo-mechanical properties, the most compatible PI for SiC and GaN semiconductor passivation while PMDA-PDA should be preferred for diamond passivation. 

It should be mentioned that as well as for metals the passivation of semiconductors (particularly on Si, GaAs, InP) is also a subject of intense investigation. However, the goal is mostly not the suppression of corrosion but either the fonnation of a dielectric layer that can be exploited for devices (MIS stmctures) or the minimization of interface states (dangling bonds) on the semiconductor surface [63, 64]. 

As outlined above, electron transfer through the passive film can also be cmcial for passivation and thus for the corrosion behaviour of a metal. Therefore, interest has grown in studies of the electronic properties of passive films. Many passive films are of a semiconductive nature [92, 93, 94, 95, 96, 97, 98, 99, 100, 101, 102 and 1031 and therefore can be investigated with teclmiques borrowed from semiconductor electrochemistry—most typically photoelectrochemistry and capacitance measurements of the Mott-Schottky type [104]. Generally it is found that many passive films cannot be described as ideal but rather as amorjDhous or highly defective semiconductors which often exlribit doping levels close to degeneracy [105]. 

In most cases, CVD reactions are activated thermally, but in some cases, notably in exothermic chemical transport reactions, the substrate temperature is held below that of the feed material to obtain deposition. Other means of activation are available (7), eg, deposition at lower substrate temperatures is obtained by electric-discharge plasma activation. In some cases, unique materials are produced by plasma-assisted CVD (PACVD), such as amorphous siHcon from silane where 10—35 mol % hydrogen remains bonded in the soHd deposit. Except for the problem of large amounts of energy consumption in its formation, this material is of interest for thin-film solar cells. Passivating films of Si02 or Si02 Si N deposited by PACVD are of interest in the semiconductor industry (see Semiconductors). 

The excellence of a properly formed Si02—Si interface and the difficulty of passivating other semiconductor surfaces has been one of the most important factors in the development of the worldwide market for siUcon-based semiconductors. MOSFETs are typically produced on (100) siUcon surfaces. Fewer surface states appear at this Si—Si02 interface, which has the fewest broken bonds. A widely used model for the thermal oxidation of sihcon has been developed (31). Nevertheless, despite many years of extensive research, the Si—Si02 interface is not yet fully understood. 

For example, chloride and duoride ions, even in trace amounts (ppm), could cause the dissolution of aluminum metallization of complimentary metal oxide semiconductor (CMOS) devices. CMOS is likely to be the trend of VLSI technology and sodium chloride is a common contaminant. The protection of these devices from the effects of these mobile ions is an absolute requirement. The use of an ultrahigh purity encapsulant to encapsulate the passivated IC is the answer to some mobile ion contaminant problems. 

First, the designer should choose the type of rectification technology that is most appropriate for the application. The choice is whether to use passive rectification in which semiconductor rectifiers are used or synchronous recification in which power MOSFE B are placed in parallel with a smaller passive rectifier. Synchronous rectifiers are typically used in battery operated portable products where the added efficiency, usually an added two to eight percent, is important to extend the operating life of the battery or in applications where heat is important. In today s switching power supplies, passive rectifiers can dissipate 40 to 60 percent of the total losses within the power supply. Synchronous rectifiers affect only the conduction loss, which can be reduced by as much as 90 percent. 

Passivity of Metals and Semiconductors. (M. Froment, ed.) Elsevier, Amsterdam, 1983. 

Froment, M. (Ed.), Passivity of Metais and Semiconductors, Elsevier, Amsterdam, (1983)... 

Surface recombination processes of charge carriers are mechanisms that cannot easily be separated from real semiconductor interfaces. Only a few semiconductor surfaces can be passivated to such an extent as to permit suppression of surface recombination (e.g., Si with optimized oxide or nitride layers). A pronounced dip is typically seen between the potential-dependent PMC curve in the accumulation region and the photocurrent potential curve (e.g., Fig. 29). This dip may be partially caused by a surface... 

Passivation layers, multilayer resist stacks, diffusion barriers, interlevel dielectrics, side-wall spacers, trench masks, oxidation masks, etc., in semiconductor devices. 

Passivation layers, surface dielectric, and doping barriers in semiconductor devices. 

A widely used glass is phosphosilicate (PSG), which is used extensively in semiconductor devices as a passivation and planarization coating for silicon wafers. It is deposited by CVD by the reaction of tetraethyl orthosilicate (TEOS) (C2H50)4Si, and trimethylphosphate PO(OCH3)3, in a molecular ratio corresponding to a concentration of 5 to 7% P. Deposition temperature is usually 700°C and pressure is 1 atm. 

---