Metallic interconnects materials

Directed Oxidation of a Molten Metal. Directed oxidation of a molten metal or the Lanxide process (45,68,91) involves the reaction of a molten metal with a gaseous oxidant, eg, A1 with O2 in air, to form a porous three-dimensional oxide that grows outward from the metal/ceramic surface. The process proceeds via capillary action as the molten metal wicks into open pore channels in the oxide scale growth. Reinforced ceramic matrix composites can be formed by positioning inert filler materials, eg, fibers, whiskers, and/or particulates, in the path of the oxide scale growth. The resultant composite is comprised of both interconnected metal and ceramic. Typically 5—30 vol % metal remains after processing. The composite product maintains many of the desirable properties of a ceramic however, the presence of the metal serves to increase the fracture toughness of the composite. 

This topic is well covered by the contributions in this volume. CMP continues to be viewed as a surprisingly unique and flexible semiconductor fabrication technology by virtue of its ability to make manufactureable potential fabrication sequences that are either too cumbersome or too low in yield to be fabricated in any other manner. Using virtually any CMP polisher, a variety of materials of interest to IC fabricators can be planarized. These materials include insulators, semiconductors, interconnect metals, and barrier metallurgies. This means that once a user becomes adept in polishing one kind of material, typically oxide and W at first, other materials of interest and other semiconductor processing sequences become viable. 

In reflectometry, the light passes through the films to be measured. Beneath the transparent films, there must be an opaque substrate through which light does not pass. The substrate characteristics must be modeled correctly to calculate the thicknesses of the films above. In silicon processing, theoretically, any of the commonly used metal materials, such as the titanium nitride (TiN), aluminum (Al), and tungsten (W), can be used as substrates. However, in reality, whereas a PMD oxide can be measured on the polysilicon material used in poly interconnections, an ILD oxide can not be measured directly on TiN, because the TiN layer used is too thin to be opaque. TiN is semitransparent if its thickness is less than 1000 A. A thin... 

As device features diminish in size, Cu CMP has become the dominant CMP process for processing this device in the back end. Cu has several attributes that make it attractive as an interconnect material for such devices.f Electrochemically, Cu is noble compared to W and Al. Its hardness falls between W and A1 and will not scratch as easily as Al. It has higher electromigration resistance than W or Al/Cu, which has been conventionally used as the interconnect metal in current devices. 

P.C. Andricacos, C. Uzoh, J.O. Dukovic, J. Horkans, and H. Deligianni, in Electrochemical Processing in ULSI Fabrication I and Interconnect and Contact Metallization Materials, Processes, and Reliability, P.C. Andricacos, J.O. Dukovic, G.S. Mathad, G.M. Oleszek, H.S. Rathore, C. Reidsema Simpson, Editors, PV 98-6, p. 48, The Electrochemical Society Proceedings Series, Pennington, NJ (1999). 

The object of semiconductor lithography is to transfer patterns of ICs drawn on the mask or reticle to the semiconductor wafer substrate. The transfer is carried out by projecting the image of the reticle with the aid of appropriate optical elements of an exposure tool onto a radiation-sensitive resist material coated on the semiconductor wafer, typically made of silicon, and stepping the imaging field across the entire wafer to complete a layer. The shape of the IC pattern transferred to the wafer substrate is dependent entirely on the wafer layer being patterned. Examples of patterns include gates, isolation trenches, contacts, metal interconnects, and vias to interconnect metal layers. An advanced CMOS (complementary... 

Metallic materials for be used as interconnects in SOFCs should fulfil a number of specific requirements [1, 2], Crucial properties of the materials are high oxidation resistance in both air and anode environment, low electrical resistance of the oxide scales formed on the alloy surface as well as good compatibility with the contact materials. Additionally, the value of the coefficient of thermal expansion (CTE) should match with those of the other cell components [3], These requirements can potentially be achieved with high chromium ferritic steels [4], however, previous studies [5] have shown that none of the commercially available ferritic steels seems to possess the suitable combination of properties required for long term reliable cell performance. 

Metallic interconnections are better than ceramic because of their low electrical resistivity. Three types of metallic materials are used for interconnection Fe based, Ni based, and Cr based. Details of them are in [45]. CTE mismatch is a big issue for stainless steel interconnection since the thermal cyclying of SOFC usually generates thermal stresses at the interconnection. 

Tantalum (Ta) and tantalum nitride (TaN) are particularly suitable materials for use in the damascene process as adhesion-promoting and/or diffusion barrier layers for copper-based devices. However, the properties of Ta and of TaN differ from those of copper, being considerably more chemically inert, such that abrasive-free polishing compositions useful for the polishing of copper are often unsuitable for the removal of underlying Ta and TaN. Hence, independent chemistries are often developed to clear Ta/TaN without further dishing of interconnect metal (Cu) or dielectric loss. 

Even when low-cost materials are used, additional procedures are needed to achieve the required reliability and durability. Therefore, cost should be considered in combination of raw materials cost and fabrication cost. This is particularly true for metal interconnects metal interconnects are cheap in materials cost compared with La-based oxide but additional procedure of coating increases the fabrication cost. 

Contact corrosion can occur when two or more metals or metallic materials and electron-conducting solids with different free corrosion potentials Ur (rest potential) are interconnected so as to conduct electrons in the same electrolyte solution. The contact site not necessarily needs to be in the corrosive medium. The position of the materials in the practical electrochemical series for seawater decides which material will become the anode and which the cathode of the corroding element when they are paired. The corrosion potential of the cathode is lowered, that of the anode is raised. 

A drawback of this method is that micro-Raman spectroscopy cannot generally be applied to metallic materials. Furthermore, stress estimation can only be made on the basis of Raman spectra gathered in the substrate and the dielectric on the sides of the interconnect lines. Such measurements cannot be made in the region immediately below the line, where the stress is more uniform and more sensitive to the stress in the lines themselves, if the substrate is nontransparent. Despite these limitations, the micro-Raman spectroscopy method has been successfully used to infer the average values of internal stress components in interconnect lines tested in the as-fabricated condition as well as after electromigration testing (Ma et al. (1995) DeWolf et al. (1999)). 

In addition to compatibility with the electrolyte, compatibility of the cathode with the interconnect is also important. Both oxide ceramic and metallic materials are used as interconnects in SOFCs. As expected, these two types of interconnects present quite different issues in their compatibility with the cathode. 

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