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Wafer substrates

Polysilanes as reducing agents. In a paper on the formation of conductive circuits by UV patterning of polysilane films, the inherent reducing ability of polysilanes to effect the reduction of a silver salt to silver metal was described.307 PMPS, PPHS [(PhSiH) ], and PDFIS were separately spin-coated on glass or silicon wafer substrates, and after drying... [Pg.611]

Our experiments have shown that hydrogen is critical for growth. The required presence of both hydrogen and metal catalysts, and the virtual absence of silicon vapor suggest that totally new reaction paths assist in the growth of these nanowires under the conditions studied. If silicon does not come directly from the wafer substrate, then it is required to become airborne in some form, as in the CVD production of SiNW, thus enabling tip growth. [Pg.175]

Baseline Process. DuPont PI2545, PI2555 and Hitachi PIQ as received from the manufacturer, were spun in a class 100 clean room environment at appropriate spin speeds to achieve 0.5 - 6 y film thickness. The silicon wafer substrates were pre-spun (5K rpm, 30") with 0.05% DuPont VM651 (y-amino propyltriethoxy silane) adhesion promoter in 95/5 (v/v) methanol/HzO. The polyimide film cast on the silane-coated silicon wafer was pre-baked... [Pg.93]

The test structure for C-V characteristic determination was slmlllar except that resistivity of the silicon wafer substrate was 6-12 ficm. [Pg.94]

DePalma and Tillman investigated self-assembled monolayer films from three silanes, tridecafluorooctyltrichlorosilane, undecyltrichlorosilane, and octadecyl-trichlorosilane, on silicon, a popular model substrate for such studies with great relevance to potential semiconductor coating applications. They characterized the films by ellipsometry and contact angle measurements (data for trideca-fluorooctyltrichlorosilane are included in Table 1), but more usefully from an applicational viewpoint, they carried out friction and wear measurements with a pin-on-disk device where the silicon wafer substrate, coated with monolayer, is moved under a spherical glass slider. Optical microscopy was used to assess wear. Table 2 summarizes DePalma and Tillman s data and their comparison with the classical self-assembled monolayer friction studies of Levine and Zisman [18]. [Pg.71]

Other classes of silanes, namely alkoxy, halogenated, and other silanes [3, 9], are known to react with —OH containing compounds, and, therefore, should also function as adhesion promoters or surface modifiers for —OH containing substrates. Texas Instruments, for example, employed a 2% xylene solution of phenyltrichlorosilane to provide resist image adhesion to various oxide wafer substrates [10]. References 3, 9, and 10 describe many of these materials applied to silicone dioxide substrates. As for HMDS treatment, ESCA evidence of reactions to verify covalent bonding to surface silanol groups will be provided in... [Pg.441]

What is accomplished by adhesion promotion treatments in IC manufacturing should actually be referred to as wafer substrate preparation, and not adhesion. Adhesion in the structural sense, as experienced in airplane composite material parts attachment, is not accomplished by silane wafer processing treatments except for the PI applications discussed early in this paper. The term adhesion, as it is used here, refers to a more practical definition—that is, resist image adhesion. Nevertheless, this type of adhesion is essential to the huge international semiconductor business, and the early silane work of Plueddemann and others was essential to early wafer adhesion process development. [Pg.459]

Fig. 11.4 Library design of a 64-element electrocatalyst library of Pt-Fe binary alloys. The square (Plate 1) and the 64 round spots represent the wafer substrate and the location of individual electrocatalyst alloys, respectively. The pie-chart character of each catalyst represents its chemi cal composition, ranging, from left to right, from 100% Pt to 100% Fe. Each row, A—H, is identical. During synthesis, this library design will be deposited onto the electrode array. The design was created using... Fig. 11.4 Library design of a 64-element electrocatalyst library of Pt-Fe binary alloys. The square (Plate 1) and the 64 round spots represent the wafer substrate and the location of individual electrocatalyst alloys, respectively. The pie-chart character of each catalyst represents its chemi cal composition, ranging, from left to right, from 100% Pt to 100% Fe. Each row, A—H, is identical. During synthesis, this library design will be deposited onto the electrode array. The design was created using...
Fig. 4. The n-A isotherm and AFM image of the scanned area 10x10 pm2 for the OTS/FOETS (50/50) mixed monolayer, which was transferred onto the silicon wafer substrate by the LB method at the surface pressure of 25 mN m-1. Fig. 4. The n-A isotherm and AFM image of the scanned area 10x10 pm2 for the OTS/FOETS (50/50) mixed monolayer, which was transferred onto the silicon wafer substrate by the LB method at the surface pressure of 25 mN m-1.
Numerous types of materials have been made by CVD techniques, such as metal carbides, borides, silicides, oxides, nitrides, and chalcogenides, as well as films of pure metals.27 For example, thermolysis of Cp PtMe3 deposits films of platinum on glass or silicon wafer substrates,28 while Pd(hfacac)2 (hfacac = 1,1,1,5,5,5-... [Pg.42]


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