Gate silicon nitride

The most common a-Si H TFT structure is the so-called inverted staggered transistor structure [40], in which silicon nitride is used as the gate insulator. A schematic cross section is shown in Figure 74. The structure comprises an a-Si H channel, a gate dielectric (SiN.v), and source, drain, and gate contacts. 

The metal gate may also be replaced with silicon nitride or polymeric pH-selective membranes58. 

Schorner, R., et al., Enhanced Channel Mobility of 4H-SiC Metal-Oxide-Semiconductor Transistors Fabricated with Standard Polycrystalline Silicon Technology and Gate-Oxide Nitridation, Applied Physics Letters, Vol. 80, No. 22, June 3, 2002, p. 176. 

Here, 41 indicates the thin film transistors, 51 the substrate, 43 a dielectric layer, 49 polysilicon gates, 50 gate electrodes, 55 contact plugs, 56 bottom electrodes, 53 the planarization layer, 54 the mercury cadmium telluride layer and 57 the top electrode layer. The planarization layer is formed from silicon oxide, silicon nitride, silicon oxide nitride or from a polyimide. The planarization layer may be formed as a double or triple layer. 

Silicon nitride is typically used as the material for a hydrogen ion-sensitive gate, but tantalum oxide and aluminum oxide can also be used (4). FETs sensitive to other ionic species use other ion-sensing membranes (5). The reader is directed to reviews (33-35) of the fabrication, function, and operation of ion-sensitive FETs. 

In the semiconductor technology area most of the experience has been accumulated from research and development in cleaning the silicon substrates. For CMP technologies a variety of additional materials are involved — insulators (like SiOj. doped SiOj, and polymers), high dielectric constant materials (like BaTiOj), polysilicon (doped or undoped), silicides to form low resistivity gate interconnections on top of doped polysilicon, metals (like Cu and Al, and their alloys, W, metal-nitrides, and Ta), silicon nitride, and many others, some of which have been discussed in earlier chapters. Thus cleaning processes must be... 

The ion-sensitive surface of the ISFET is naturally sensitive to pH changes, but the device may be modified so that it becomes sensitive to other species by coating the silicon nitride gate insulator with a polymer containing molecules that tend to form complexes with species other than hydronium ion. Furthermore, several ISFETs may be fabricated on the same substrate so that multiple measurements may be made at the same time. All the ISFETs may detect the same species to enhance accuracy and reliability, or each ISFET may be coated with a different polymer so that measurements of several different species may be made. Their small size (about 1 to 2 mm ), rapid response time relative to glass electrodes, and ruggedness suggest that ISFETs may be the ion detectors of the future for many applications. 

Gates, R.S. Hsu, S.M. Silicon-nitride boundary lubrication-lubrication mechanism alcohols. Trib. Trans. 1995, 38 (3), 645. 

Lustig, N. Kanicki J. (1989). Gate dielectric and contact effects in hydrogenated amorphous silicon-silicon nitride thin-film transistors, J. Appl. Phys., Vol. 65, 3951-3957, ISSN 0003-6951... 

The Shockley equations describe a linear dependence between drain current and permittivity of the gate dielectric. In order to lower the supply voltage of OFETs, silicon nitride was examined because its permittivity Cnitride 8 is almost twice as large as that of silicon dioxide. Moreover, with a roughness of 1-2 nm rms it has the smoothest surface of the chemical vapour deposited dielectrics, which is one essential requirement for the growth of a well-ordered pentacene film. 

In the following, a silicon nitride layer was deposited as the gate dielectric on a thermally oxidised silicon wafer. The nitride layer was re-oxidised to enhance the electrical stability. The silicon dioxide below the nitride film adopted the function of a buffer layer to reduce mechanical stress between the silicon and silicon nitride due to different thermal coefficients of expansion. To deposit the dielectric film, ammonia gas and triethylsilane were put into the process tube in a ratio of 1 5, at 800 °C and at a process pressure of 0.3 mbar. The thickness of the deposited dielectric film was about 75 nm in total. 

The high deposition temperature excluded the manufacturing of simple circuits using silicon nitride as gate dielectric for transistors with a metal gate electrode. Therefore, another gate dielectric, deposited at lower process temperatures, is necessary. 

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