Fabrication interconnection

A gas foaming/particulate leaching process can be employed to fabricate interconnected open pore structures of PLGA for controlled release of DNA [113,199]. This process employs carbon dioxide to process a mixture of polymer and porogen, in order to fuse adjacent polymer particles into an interconnected structure. The DNA can be lyophilized with the microspheres [113] or encapsulated within the microspheres [200,201]. Lyophilization of DNA with the microspheres can provide large quantities of incorporated DNA, with relatively rapid release kinetics. Incorporation of DNA into the microspheres provides for a more sustained release relative to the lyophilization method [200], with the release kinetics dependent on the polymer molecular weight and microsphere size [201]. DNA can be incorporated into polymer microspheres using several approaches [201-205]. Subcutaneous implantation of scaffolds results in transfected cells observed within the scaffold... 

The result is the formation of a dense and uniform metal oxide layer in which the deposition rate is controlled by the diffusion rate of ionic species and the concentration of electronic charge carriers. This procedure is used to fabricate the thin layer of soHd electrolyte (yttria-stabilized 2irconia) and the interconnection (Mg-doped lanthanum chromite). 

Metallization. Integrated circuits require conductive layers to form electrical connections between contacts on a device, between devices on a chip, between metal layers on a chip, and between chips and higher levels of interconnections needed for packaging the chips. It is critical to the success of IC fabrication that the metallization be stable throughout the process sequence in order to maintain the correct physical and electrical properties of the circuit. It must also be possible to pattern the blanket deposition. 

Pt—Q—Salt, [Pt(NH3)2(HP04)] and [Pt(OH)3] (259,260). Chloride-based baths have been superseded by P-Salt-based baths, which are more stable and relatively easily prepared. Q-Salt baths offer even greater stabiUty and produce hard, bright films of low porosity. Plating under alkaline conditions employs salts of [Pt(OH3)] . These baths are easily regenerated but have low stabiUty. Platinum films have uses in the electronics industry for circuit repair, mask repair, platinum siUcide production, and interconnection fabrication (94). Vapor deposition of volatile platinum compounds such as [Pt(hfacac)2] and... 

Interconnect. Three-dimensional structures require interconnections between the various levels. This is achieved by small, high aspect-ratio holes that provide electrical contact. These holes include the contact fills which connect the semiconductor silicon area of the device to the first-level metal, and the via holes which connect the first level metal to the second and subsequent metal levels (see Fig. 13.1). The interconnect presents a major fabrication challenge since these high-aspect holes, which may be as small as 0.25 im across, must be completely filled with a diffusion barrier material (such as CVD titanium nitride) and a conductor metal such as CVD tungsten. The ability to fill the interconnects is a major factor in selecting a thin-film deposition process. 

The rapid fabrication of covalently bonded ID functional molecular lines with predefined location, direction, and length provides a means to make a predesigned interconnection of molecular lines running along and across the dimer rows. Indeed, the perpendicularly connected allyl mercaptan and styrene lines or allyl mercaptan and acetone lines have been fabricated on the H-Si(l 00)-2 X 1 surface. °° 2 ... 

Ceramic boards are currently widely used in high-performance electronic modules as interconnection substrates. They are processed from conventional ceramic precursors and refractory metal precursors and are subsequently fired to the final shape. This is largely an art a much better fundamental understanding of the materials and chemical processes will be required if low-cost, high-yield production is to be realized (see Chapter 5). A good example of ceramic interconnection boards are the multilayer ceramic (MLC) stractures used in large IBM computers (Figure 4.11). These boards measure up to 100 cm in area and contain up to 33 layers. They can interconnect as many as 133 chips. Their fabrication involves hundreds of complex chemical processes that must be precisely controlled. 

FIGURE 4.15 Cross-section of multilevel interconnections for advanced bipolar devices. Fourteen separate layers are laid down in the fabrication of interconnections such as the one shown. The precise orientation and composition of these layers are controlled by chemical process steps. Copyright 1982 by the International Business Machines Corporation. Reprinted with permission. 

A current example of a problem that can be simplified through segregation of its components by physical scale is the deposition of on-chip interconnects onto a wafer. Takahashi and Gross have analyzed the scaling properties of interconnect fabrication problems and identified the relevant control parameters for the different levels of pattern scale [135], They define several dimensionless groups which determine the type of problem that must be solved at each level. 

Cacciolati O, Joachim C, Martinez JP, Carcenac F (2004) Fabrication of N-electrodes nanojunction for monomolecular electronic interconnects. Int J Nanosci 3 233... 

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