Bipolar device

In an HBT the charge carriers from an emitter layer are transported across a thin base layer and coUected by a third layer called the coUector. A small base current is present which iacludes the carriers that did not successfully cross the base layer from the emitter to the coUector. The FET is a unipolar device making use of a single charge carrier in each device, either electrons or holes. The HBT is a bipolar device, using both electrons and holes in each device. The emitter and coUector layers are doped the same polarity n- or -type), with the base being the opposite polarity (p- or n-ty- e). An HBT with a n-ty e emitter is referred to as a n—p—n device ap—n—p device has a -type emitter. The n—p—n transistors are typicaUy faster and have been the focus of more research. For the sake of simplicity, the foUowing discussion wiU focus on n—p—n transistors. 

FIGURE 4.15 Cross-section of multilevel interconnections for advanced bipolar devices. Fourteen separate layers are laid down in the fabrication of interconnections such as the one shown. The precise orientation and composition of these layers are controlled by chemical process steps. Copyright 1982 by the International Business Machines Corporation. Reprinted with permission. 

Ohm.cm2 (of visible surface area) or even less. Some visible ways to lower the electrode resistivity are (a) fabricating thin electrodes, (b) increasing the conductivity of electrolyte and electrode material, (c) matching the electrode porosity with the size of species in the electrolyte in order to facilitate the ion transport along the pores, and (d) assembling bipolar devices. 

Furthermore, the stacking order has been identified as that of the 3C-SiC polytype and, according to the stndy by Stahlbnsh, an explanation to the recombinative behavior of the stacking fanlt is that the 3C-SiC, having a lower bandgap than 4F1-SiC, acts as a qnantnm well, thereby enhancing the recombination [63]. It is a very serious materials issue that must be solved prior to the realization of commercial bipolar devices. 

Work is ongoing to reduce defects in SiC material. One of the more interesting concepts is the reduction of defects through epitaxial growth on porous SiC substrates [64]. This approach has clearly demonstrated a reduction in intrinsic defects, as evidenced by photoluminescence measurements. It is too early to tell whether this technique can provide a path forward for the bipolar devices but it will clearly find its applicability in several areas where SiC will have a market. 

The market study by Yole estimates the SiC power-device market to be close to 600 million in 2007 and growing rapidly. This also covers bipolar devices, which are at higher voltages. 

Bipolar Transistors. In bipolar devices, both electrons and holes participate in the conduction process, in contrast to MOSFETs, in which only one carrier type dominates. Bipolar technology has been used typically for high-speed-logic applications. 

MOSFETs. The metal-oxide-semiconductor field effect transistor (MOSFET or MOS transistor) (8) is the most important device for very-large-scale integrated circuits, and it is used extensively in memories and microprocessors. MOSFETs consume little power and can be scaled down readily. The process technology for MOSFETs is typically less complex than that for bipolar devices. Figure 12 shows a three-dimensional view of an n-channel MOS (NMOS) transistor and a schematic cross section. The device can be viewed as two p-n junctions separated by a MOS capacitor that consists of a p-type semiconductor with an oxide film and a metal film on top of the oxide. 

TYPICAL STEPS IN PROCESSING A BIPOLAR DEVICE MASK PROCESS STEP... 

For simplicity, in this discussion of the physical basis for electrical conductivity, it shall henceforth be presumed that rr is a scalar that is, consideration will only be given to isotropic media such as cubic crystals or polycrystalline samples. Likewise, the theory of current flow in bipolar devices, such as through silicon p-n junctions, belongs in the realm of electrical engineering or semiconductor physics and is only briefly discussed in this text. 

When we think about recent OLED devices from various viewpoints, we can say that the success of OLED is due to an active utilization of electron-transport materials. Especially, the discovery of various classes of organic ETMs has really opened the possibility of bipolar devices. 

Fig. 1 a Schematic diagram showing the Ip and Ea values of PFO relative to the work functions of common electrode materials used in PLEDs. The figures in brackets are the respective energies in eV. The optical gap energy g (2.95 eV) is also shown (taken from [12]). b Current density-voltage characteristics of a PEDOT/PFO/Au (hole-only device) and Ag/PFO/Ca (electron-only device). Bipolar device of ITO/PFO/Ca and PEDOT/PFO/Ca are also shown (taken from [13]). Note that PEDOT is the abbreviation of PEDOT PSS here... 

Both CMOS and bipolar devices encapsulated with the new transfer molding compositions performed well under thermal cycling between -65°C and + 150°C and also under accelerated life testing at 145°C, 85% RH and 18V bias. Further optimization of this type of molding composition is expected to improve its performance as a protective material for integrated circuitry. 

Depth limitations for the isolation regions also do not exist. Furthermore, in its ultimate application, the trench isolation process eliminates the requirement for both the subcollector and P+ diffusion subisolation masks, as well as the P+ diffusions (see Figure 2). Instead, a blanket subcollector is diffused into the substrate across the whole surface of a wafer. This eliminates another key bipolar device process concern - epitaxial... 

Table II. Trench Isolation Technology Features (for Bipolar Devices)...

These process steps, as practiced for the trench isolation process, are either new or modifications or extensions of previously practiced processes used for other aspects of device fabrications. Consequently, several of these steps did require general process development on an individual basis, prior to their integration into the overall process. Some of the efforts have resulted in new basic knowledge in the area of reactive ion etching (RIE) and chemical vapor deposition, surface planarization with resist materials, and thermal oxidation or nonplanar silicon surfaces. The author has previously presented various aspects of these process activities (4-8), as applied to the bipolar device technology. 

---