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Diffusion Barriers and Seed Layer

Copper introduces new problems in the fabrication of interconnects on chips. The most important one is the diffusion of Cu into Si, SiC 2, and other dielectrics [92], and reaction of Cu with Si forming silicides [109]. Diffusion of Cu through Si results in the poisoning of devices (transistors) and diffusion through SiC 2, dielectrics, leads to the degradation of dielectrics, which can result in [Pg.138]

Since barrier metals have relatively high electrical resistivity (Ta 12.4 Ti 80 gf2cm) [Pg.139]

Co—W(P), and selective CVD(W) [114, 115]. The preferred dielectric barrier material (Fig. 41b) is blanket SiNx. The result of capping is a fully encapsulated Cu line (Fig. 41). [Pg.140]

It can be seen from the above discussion that Cu is electrodeposited in vias and trenches on a bilayer barrier metal/Cu seed layer. In cases when the barrier layer is composed of two layers (e.g. TiN/Ti), Cu is electrodeposited on a trilayer barrier bi-layer/Cu seed layer. This type of underlayer for the electrodeposition of Cu raises a series of interesting theoretical and practical questions of great significance regarding the reliability of interconnects on chips. In Sect. 3.7.1, we have shown that the [Pg.141]

Integration of Cu with a dielectric introduces new problems and challenges [119] [Pg.142]


Deposition of Cu Interconnections on Chips Diffusion Barriers and Seed Layer. ... [Pg.2410]

For future interconnects a variety of diffusion barrier and seed layer materials are being investigated. Ir/TaN, Co(W), TaNx, and Cu(Mn)/Co(W) have been reported. ... [Pg.40]

Figure 4. Process steps for the dual damascene process a) deposition of dielectric, b) dielectric RIE to define via and line, c) deposition of diffusion barrier and Cu seed layer, d) electrodeposition of Cu into via and trenches followed by Cu CMP. Figure 4. Process steps for the dual damascene process a) deposition of dielectric, b) dielectric RIE to define via and line, c) deposition of diffusion barrier and Cu seed layer, d) electrodeposition of Cu into via and trenches followed by Cu CMP.
Copper is going to replace aluminum as the material of choice for semiconductor interconnects due to its low electrical resistance and high electromigration resistance (1-4). An inlaid interconnect is used for copper metallization in which the insulating dielectric material is deposited first, trenches and vias are formed by patterning and selective dielectric etching, and then diffusion barrier and copper seed layer are deposited into the trenches and vias (5). [Pg.122]

Figure 17.11. Process steps for forming Cu interconnects using the single damascene process (dielectric patterning) (a) planarized substrate (b) dielectric deposition (c) dielectric RIE through photoresist mask (d) etched insulator (e) deposition of diffusion barrier (Ta) and Cu seed layer (/) electrodeposition of Cu into a via (vertical interconnection) ( ) CMP of Cu excess Qi) patterning and deposition of Cu line (wire). Figure 17.11. Process steps for forming Cu interconnects using the single damascene process (dielectric patterning) (a) planarized substrate (b) dielectric deposition (c) dielectric RIE through photoresist mask (d) etched insulator (e) deposition of diffusion barrier (Ta) and Cu seed layer (/) electrodeposition of Cu into a via (vertical interconnection) ( ) CMP of Cu excess Qi) patterning and deposition of Cu line (wire).
On the other hand, several reports have been published that point out that when a polymeric surfactant acting as an electrosteric stabilizer is used, the rate of radical entry into a polymer particle should decrease due to a diffusion barrier of the hairy layer built up by the polymeric surfactant adsorbed on the surface of the polymer particles [34-36]. Coen et al. [34] found that in the seeded emulsion polymerization of St using a PSt seed latex stabilized elec-trosterically by a copolymer of acrylic acid (AA) and St, the electrosteric stabilizer greatly reduced the radical entry rate p compared to the same seed latex... [Pg.14]

All experiments were performed on 200mm wafers using Semitool s plating tool. Trenches with various geometries and aspect-ratios were patterned in silicon oxide coated wafers. Titanium Nitride (TiN) or Tantalum (Ta) diffusion barriers with nominal thickness of 300 A were deposited on the trenches by vacuum techniques such as PVD or CVD. Unless specified differently, a PVD copper adhesion layer with a nominal thickness of 200A was deposited on top of the barrier by PVD techniques. This thin PVD copper adhesion layer was electrochemically enhanced in Semitool s proprietary ECD seed plating solution prior to the full deposition from an acid copper sulfate bath. [Pg.123]

In our study, a three-layered Al/Cu/Ti film was employed as the seeding layer for electroless Cu deposition process. These metal films were deposited using the electron-beam evaporation technique and the substrates employed were thermally oxidized <100> silicon wafers. Ti is employed as the first layer, to serve as a barrier/adhesion promotion layer since Ti adheres well to most dielectric substrates and can prevent Cu diffusion into Si02. The second layer, Cu is the best homogenous catalyst for electroless Cu deposition. The last layer, A1 is a sacrificial layer to prevent Cu oxidation before immersing into the electroless deposition solution. [Pg.169]

In an electroless plating process, no electrical connection is required to the wafer. A seed layer is however required or a conductive substrate. Nickel is frequently used in electronic devices to provide adhesion layer and diffusion barrier. The nickel is reduced at the conductive substrate and a co-reactant is present in the bath to provide the oxidation reaction, such as sodium... [Pg.1268]

Cationic surfactants, in contrast to anionic surfactants, usually reduce both the number of particles involved in the polymerization and the rate of polymerization. The nature of the stabilizing emulsifier has a marked effect on the polymerization kinetics. For example, addition of a non-ionic stabilizer [e.g., poly(vinyl alcohol), a block copolymer of carbowax 6000 and vinyl acetate, or ethylene oxide-alkyl phenol condensates] to a seed polymer stabilized by an anionic surfactant decreased the rate of polymerization to 25% of the original rate. The effect was as if the nonionic stabilizer (or protective colloid) acted as a barrier around the seed particles to alter the over-all kinetics. It may be that the viscosity of the medium in the neighborhood of the nonionic surfactant coating of the polymer particle is sufficiently different from that of an anionic layer to interfere with the diffusion of monomer or free radicals. There may also be a change in the chain-transfer characteristics of the system [156]. [Pg.257]

It is noteworthy that a basic assumption made in the derivation of the free radical desorption rate constant is that the adsorbed layer of surfactant or stabilizer surrounding the particle does not act as a barrier against the molecular diffusion of free radicals out of the particle. Nevertheless, a significant reduction (one order of magnitude) in the free radical desorption rate constant can happen in the emulsion polymerization of styrene stabilized by a polymeric surfactant [42]. This can be attributed to the steric barrier established by the adsorbed polymeric surfactant molecules on the particle surface, which retards the desorption of free radicals out of the particle. Coen et al. [70] studied the reaction kinetics of the seeded emulsion polymerization of styrene. The polystyrene seed latex particles were stabilized by the anionic random copolymer of styrene and acrylic acid. For reference, the polystyrene seed latex particles stabilized by a conventional anionic surfactant were also included in this study. The electrosteric effect of the latex particle surface layer containing the polyelectrolyte is the greatly reduced rate of desorption of free radicals out of the particle as compared to the counterpart associated with a simple... [Pg.113]


See other pages where Diffusion Barriers and Seed Layer is mentioned: [Pg.325]    [Pg.325]    [Pg.327]    [Pg.138]    [Pg.386]    [Pg.2459]    [Pg.325]    [Pg.325]    [Pg.327]    [Pg.138]    [Pg.386]    [Pg.2459]    [Pg.327]    [Pg.137]    [Pg.138]    [Pg.387]    [Pg.95]    [Pg.2458]    [Pg.2459]    [Pg.45]    [Pg.14]    [Pg.15]    [Pg.21]    [Pg.381]    [Pg.468]    [Pg.43]    [Pg.35]    [Pg.37]    [Pg.40]    [Pg.409]    [Pg.124]    [Pg.131]    [Pg.198]   


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