Barriers and Seed Layer

Diffusion barrier layers are an integral part of the fabrication of copper interconnects (Figs. 3 and 4). Barrier films isolate (encapsulate) Cu interconnects from adjacent dielectric materials. The diffusion barriers most studied to date are Ti, and TiN.  

Since barrier metals have relatively higli/low electrical resisti-vity/conductivity (Ta 12.4 Ti 80 pQ cm), it is necessary to cover the barrier layer with a conductive metal layer (seed layer). This conductive metal layer consists of a Cu seed layer that is deposited by PVD or CVD tecluiiques (Figs. 3 and 4). When the electrode 

It is seen from die discussion above that Cu is electrodeposited in vias and trenches on a bilayer barrier metal/Cu seed layer. In those cases where die barrier layer itself is composed of two layers (e.g., TiN/Ti), Cu is electrodeposited as trilayer barrier bi-layer/Cu seed layer. This type of underlayer for electrodeposition of Cu raises a series of interesting theoretical and practical questions of considerable significance regarding the reliability of inter-connects on cliips. In Section II we noted that the reliability of the 

Integration of Cu with a dielectric introduces new problems and/or challenges (l(ii), (Fig. 9). For example, when polyi-mides are used as intermetal dielectrics, reliability concerns include corrosion of the underlying metal and adhesion of the metal films to polyimide underlayers (l(ii)). 

The discussion above concerning the influence of the underlayer on the microstructure and reliability of interconnects in 1C illustrates that there is a need for an additional in depth understanding of the processes of deposition and physical-mechanical properties of electrodeposited Cu used in IC fabrication. 

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Deposition of Cu Interconnections on Chips Diffusion Barriers and Seed Layer. ... 

For future interconnects a variety of diffusion barrier and seed layer materials are being investigated. Ir/TaN, Co(W), TaNx, and Cu(Mn)/Co(W) have been reported. ... 

Then a very thin barrier layer and a copper seed layer are formed (Figs. 21 (b) and 21 (c)>). In order to conduct the electric current, good conductive material, e.g., copper, will be coated on the surface of the copper seed layer which forms a rough surface as shown in Fig. 21(d). Since multilayer s introduction into IC production, the surface coated with copper must be very smooth, clean, and bare of dielectric stacks... 

Figure 17.11. Process steps for forming Cu interconnects using the single damascene process (dielectric patterning) (a) planarized substrate (b) dielectric deposition (c) dielectric RIE through photoresist mask (d) etched insulator (e) deposition of diffusion barrier (Ta) and Cu seed layer (/) electrodeposition of Cu into a via (vertical interconnection) ( ) CMP of Cu excess Qi) patterning and deposition of Cu line (wire).

Figure 4. Process steps for the dual damascene process a) deposition of dielectric, b) dielectric RIE to define via and line, c) deposition of diffusion barrier and Cu seed layer, d) electrodeposition of Cu into via and trenches followed by Cu CMP.

Copper is going to replace aluminum as the material of choice for semiconductor interconnects due to its low electrical resistance and high electromigration resistance (1-4). An inlaid interconnect is used for copper metallization in which the insulating dielectric material is deposited first, trenches and vias are formed by patterning and selective dielectric etching, and then diffusion barrier and copper seed layer are deposited into the trenches and vias (5). 

In our study, a three-layered Al/Cu/Ti film was employed as the seeding layer for electroless Cu deposition process. These metal films were deposited using the electron-beam evaporation technique and the substrates employed were thermally oxidized <100> silicon wafers. Ti is employed as the first layer, to serve as a barrier/adhesion promotion layer since Ti adheres well to most dielectric substrates and can prevent Cu diffusion into Si02. The second layer, Cu is the best homogenous catalyst for electroless Cu deposition. The last layer, A1 is a sacrificial layer to prevent Cu oxidation before immersing into the electroless deposition solution. 

The copper deposition observed between TiN barrier layer and acidic copper solution containing F" ions is actually due to reaction between the bare Si material and Cu2+ through cracks in the TiN layer due to etching reaction by the fluoride ions. But other metal ions such as palladium can indeed induce displacement reaction and serve as a possible alternative for copper deposition without copper seed layer by CVD or sputtering. 

It was shown that thin films of Cu, Co and Ni could be successfully deposited onto Si substrates, without the need of a seed layer. For all three metals, uniform layers with a compact and granular morphology could be obtained. From RBS data the deposition rates as well as the current efficiencies could be determined. For Co films it was shown that addition of boric acid caused the evolution of hydrogen. On the other hand, it was possible to improve the current efficiency of electrolytes containing boric acid by increasing the concentration of cobalt sulfate in the bath. For Ni films electrodeposited from a highly concentrated sulfate electrolyte, it was observed the formation of texture in the (220)-direction. Electric measurements performed on Ni/n-Si structures yielded values for Schottky barriers which are comparable to the ones obtained for junctions fabricated by vapor deposition. 

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