Bipolar devices isolation processes

Depth limitations for the isolation regions also do not exist. Furthermore, in its ultimate application, the trench isolation process eliminates the requirement for both the subcollector and P+ diffusion subisolation masks, as well as the P+ diffusions (see Figure 2). Instead, a blanket subcollector is diffused into the substrate across the whole surface of a wafer. This eliminates another key bipolar device process concern - epitaxial... 

These process steps, as practiced for the trench isolation process, are either new or modifications or extensions of previously practiced processes used for other aspects of device fabrications. Consequently, several of these steps did require general process development on an individual basis, prior to their integration into the overall process. Some of the efforts have resulted in new basic knowledge in the area of reactive ion etching (RIE) and chemical vapor deposition, surface planarization with resist materials, and thermal oxidation or nonplanar silicon surfaces. The author has previously presented various aspects of these process activities (4-8), as applied to the bipolar device technology. 

In Figure 5-la is shown a schematic representation of a silicon MOSFET (metal-oxide-semiconductor field effect transistor). The MOSFET is the basic component of silicon-CMOS (complimentary metal-oxide-semiconductor) circuits which, in turn, form the basis for logic circuits, such as those used in the CPU (central processing unit) of a modern personal computer [5]. It can be seen that the MOSFET is isolated from adjacent devices by a reverse-biased junction (p -channel stop) and a thick oxide layer. The gate, source and drain contact are electrically isolated from each other by a thin insulating oxide. A similar scheme is used for the isolation of the collector from both the base and the emitter in bipolar transistor devices [6],... 

Si3N4 layers deposited by CVD are important in the fabrication of certain semiconductor devices. One area is in the so-called LOCOS (local oxidation of silicon) process. This method is used in both bipolar and metal oxide semiconductor (MOS) devices to isolate active device regions. The process works as follows A layer of Si3N4 is deposited on the silicon wafer by CVD either by reacting silane and ammonia at temperatures between 700 and 900°C... 

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