Resistivity electroless etching

Besides using the resists to etch copper boards, metal parts, or silicon surfaces, new applications have been disclosed. Spatial images have been holographically recorded in resists.— The resist systems of siloxanes can be converted after imaging by oxidation into passivated glass for direct formation of insulated circuits.— The resist can be filled with glass 9 or metals— and fired to form circuits directly. In one application, the resists are filled with electroless plating sensitizer for deposition of... 

SemiadditiveMethod. The semiadditive method was developed to reduce copper waste. Thin 5.0 lm (4.5 mg/cm ) copper foil laminates are used, or the whole surface may be plated with a thin layer of electroless copper. Hole forming, catalysis, and electroless copper plating are done as for subtractive circuitry. A strippable reverse—resist coating is then appHed. Copper is electroplated to 35 p.m or more, followed by tin or tin—lead plating to serve as an etch resist. The resist is removed, and the whole board is etched. The original thin copper layer is quickly removed to leave the desired circuit. This method wastes less than 10% of the copper. 

The selective Cu deposition process was suggested by Ting and Paunovic (13) as an alternative means of fabricating multilevel Cu interconnections (Fig. 19.4). The first step in this through-mask deposition process (14) is the deposition of a Cu seed layer on a Si wafer, and then a resist mask is deposited and patterned to expose the underlying seed layers in vias and trenches. In the next step, Cu is deposited to fill the pattern. After the Cu deposition mask is removed, the surrounding seed layer is etched and dielectric is deposited. Electroless Cu deposition has been suggested for the blanket and selective deposition processes (15). 

The substrate is first coated, for instance, via electroless or physical vapor deposition with a thin (< 1 pm) metallic layer, which in turn is patterned by photolithography and wet etching. This layer serves two roles, as a plating base and as an electrically conducting layer for the finished structures. In the subsequent step a sacrificial layer, of about 5 pm in tliickness, is deposited on the substrate and also patterned by photolithography and wet etching. Titanium is used most often as the sacrificial material because it adheres well to the resist and to the electrodeposited layer and can be etched with hydrofluoric acid that does not attack other materials such as chromium, silver, nickel, copper, and which are usually used in the LIGA process. 

Plating. Plating is an additive process where the copper layer is first etched.Then the layer is catalyzed for electroless plating, and photoresist is applied. Resistor locations are imaged into the resist and the pattern developed. Exposed catalyst in the proper areas then initiates plating of the resistors. The resist is stripped, background catalyst is removed, and the resistors are in the proper locations. 

CuNiAu boards fabricated either with the NiAu as the Cu etch resist or by the SMOBC process followed by electrolessly plating Ni and Au can confer improved PTH reliability. There are two mechanisms for the observed improvement the enhanced rivet effect provided by the Ni and the elimination of Cu dissolution during solder shocks such as wave soldering or PGA rework. For high-aspect-ratio holes, electroless Ni confers an additional benefit because the plating thickness in the barrel is more consistent than for conventional electroplating. 

The negative resist pattern is used to selectively build up the circuit by copper electroplating. When the required conductor thickness (typically 17 or 35 pm) is reached, it is plated with tin, tin-lead or gold as a positive resist. Removal of the resist is followed by rapid etching of the electroless copper layer. The remainder of the process is similar to that for subtractive methods. In the "folly additive method, the full conductor thickness may be built up in a single, long (24 h) electroless deposition stage. 

Copper is etched at further stages in the manufacture of printed circuit boards including, after resist application (1) removal of electroless and electroplated deposits before pattern plating with copper (2) prior to electroplating gold onto edge contacts and (3) final etching of all unwanted copper to leave the desired circuit pattern. 

There are more process steps involved in laser subtractive structuring (LSS) than in the additive or semiadditive processes (Fig. 3.2). Injection molding is followed by short surface activation to permit electroless copper or nickel plating. This chemical premetallization is followed by a galvanic process to build up the plating to target thickness. The next step is structuring as such, by application of an activatable etch resist. 

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