Pad Array Carrier

Ball grid array (EGA) or Overmolded pad-array carrier (OMPAC) In manufacture, the primary failure mode for this package is short circuits (98% vs. 2% open circuits). 

Pad array carrier (PAD), a surface mount equivalent of the PGA package. This package extends surface mount silicon efficiency from 15 to 40%. A disadvantage of this package is that the solder joints cannot be visually inspected, although X-ray inspection can be used to verify the integrity of the bKnd solder connections (and to check for solder balls and bridging). Individual solder joints, however, cannot be repaired. 

Bruce Freyman and Robert Pennisi, Motorola, Inc., Overmolded Plastic Pad Array Carriers (OMPAC) A Low Cost, High Interconnect Density IC Packaging, Proceedings of the 41st Electronics Components Technology Conference, Atlanta, GA, May 1991. 

An integrated circuit connector pad, consisting of a polymer film 22 acting as a carrier for an array of metal tubes 24 which extend through the film and protrude from each side, is continuously dipped in molten indium until the tubes are filled with indium by capillary action. The indium-filled tubes are affixed on a read-out chip. Next, the original metal tubes are etched away and the carrier is lifted off. Finally, the detector chip is aligned in position with the indium columns and the read-out chip and the detector chip are joined by pressure welding. 

ICs, chip carriers, and packages may have their I/O connections formed throughout the surface area (area arrays) as opposed to peripheral I/Os as with wire-bond pads on die or axial leads on packages. Area arrays include flip-chip, BGA, and pin-grid arrays. Area-array devices provide very high I/O counts per surface area, which are necessary for increased functionality. 

Land grid array (LGA), an Intel package used for parts such as the 80386L microprocessor. The package is similar to a PGA except that it has gold-plated pads (called landing pads) vs. pins. Leadless inverted device (LID), a shaped metallized ceramic form used as an intermediate carrier for the semiconductor chip (die). It is especially adapted for attachment to conductor lands of a thick-film or thin-film network by reflow solder bonding. 

FIG. 79 Ceramic column grid array (CCGA) configurations, a) Single melt eutectic Pb-Sn fillet, b) cast column with eutectic Pb-Sn on card pad, c) column last attach solder process (CLASP) with Pd-doped solder on chip-carrier pad and eutectic Pb-Sn fillet on card pad. 

FIG. 82 The copper column grid array (CuCGA) structure shown a) optically and b) in cross section as attached to the I/O pad of the chip carrier. (From Ref. 41.)... 

As the demand for miniaturization has increased dramatically, concentrated efforts have been made to find cheaper alternatives to established technologies of area array solder bumps. ChipPAC Incorporated demonstrated an alternate process/package concept covering both CSP and PBGA package formats whose construction is illustrated in Fig. 10. The concept package consisted essentially of three parts ACF, metalHc bumps on die bond pads, and an organic chip carrier [35]. 

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