IC packaging

The acoustic microscopy s primary application to date has been for failure analysis in the multibillion-dollar microelectronics industry. The technique is especially sensitive to variations in the elastic properties of semiconductor materials, such as air gaps. SAM enables nondestructive internal inspection of plastic integrated-circuit (IC) packages, and, more recently, it has provided a tool for characterizing packaging processes such as die attachment and encapsulation. Even as ICs continue to shrink, their die size becomes larger because of added functionality in fact, devices measuring as much as 1 cm across are now common. And as die sizes increase, cracks and delaminations become more likely at the various interfaces. 

Revay, L., Lindblad, G., and Lind, L. (1990). IC package defects revealed by scanning acoustic microscopy (SAM). CERT 90 Components engineering, Reliability and Test Conference (Electron. Components Inst.), pp. 115-22. [199]... 

Function and Scope of IC Packaging. The package of an electronic system performs several functions. The package must mechanically support the ICs, protect the ICs from adverse environmental effects, distribute electrical power, remove heat from the chips, and provide signal interconnections between the ICs and the rest of the system. 

The focus of this chapter is the first level of IC packaging, that is, the SCP or the MCP. However, many important advancements are still being made at the second and third levels of packaging. These advances include improved materials and fabrication technology for PWBs (5-7) and new... 

Figure 4. Small-outline IC package with 16 gull-wing leads on a 50-mil pitch (1 mil = 0.001 in. = 25.4 im). (Reproduced with permission from reference 28. Copyright 1985 Institute of Electrical and Electronics Engineers.)...

Since these devices are made from two components produced by means of well-established mass production technologies (thin film and printed circuit board technology) and assembling of the parts is compatible to IC packaging techniques, cost effective mass fabrication of this device seems realistic. 

Kuo A-Y, Mu Z. The IC package missing link between nanometer silicon and multi-gigabit PCB systems. Advanced Packaging Feb 2006. p 16-18. 

Solberg V, Mitchell C. Practical and cost effective solutions for 3D IC packaging. Pan Pacific Microelectronics Symposium Proceedings,2003. 

Topper M, Scherpinski K, Sporle H-P, Landesberger C, Ehrmann O, Reichel H. Thin chip integration (TCI-Modules) — a novel technique for manufacturing three dimensional IC-packages. Proc Int Symp Microelectr, SPIE 2000 4339 208-211. 

Which type of IC package has two rows of pins, one on each side of the package ... 

Which type of IC package is usually surface mounted and used for VLSI applications ... 

PGA (Pin Grid Array) A type of IC package that consists of a grid of pins connected to a square, flat package. 

QSOP (Quad Small Outline Package) A type of IC package that has all leads soldered directly to the circuit board. Also called a surface mount chip. 

Keyword IC package, molding resin, recycling, printed wiring board... 

At a microscopic level the contact surface is restricted by peaks and valleys and even highly polished surfaces may exhibit a high peak to valley ratio. This makes it necessary to use an extremely flat contact surface between the heat source and thermal spreader to guarantee an efficient transfer of heat. Chemical vapor deposition diamond with a thickness of 1000 pm has been used for Multi Chip Modules (MCM) for this purpose. Heat spreaders are used in the electronic industry for IC packaging and solid-state lasers. 

Figure 1 also shows the small outline IC package (SOIC), which... 

Figure 1. Example of current IC packages. (Reproduced with permission from Ref. 4. Copyright 1988 BPA [Technology and Management, Ltd.].)...

The hierarchy of interconnection is typically as follows Zero level—interconnection of elements on the IC chip itself. This level of interconnection is intrinsically part of the chip design. First level—connection of the IC chip to the next-higher level, usually an IC package, either by wire bonding or, more recently, by TAB. 

Second level—connection of the IC package to the printed circuit board. A key alternate route is direct mounting of the chip on the board, saving one level of interconnection. The chips are protected by the use of gel ("blob top") coatings of polymeric encapsulants applied directly to the IC chip. 

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