Functional gate dielectrics

Another consideration for gate dielectrics is selecting materials which provide interesting device functionalities. 

One functional gate dielectric of interest to a number of groups is using a ferroelectric material to retain state in transistor devices. This has a range of applications including latching circuits [97] and memory storage elements 

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Three-methods have been pursued to organize monolayers from different organic compounds to form molecular monolayer FETs (1) thermal evaporation of approximately monolayer thickness on the dielectric surface of FETs, (2) Langmuir-Blodgett assembly on the water surface and transfer to device surfaces, and (3) self-assembly of functionalized organic compounds on the surface of the gate, or gate dielectric layers of FETs. 

Fig. 10 (a) Transfer characteristics in the linear and saturation regimes for a-substituted quinquethiophene liquid crystalline monolayers assembled on the Si02 gate dielectric surface of a 40 pm channel length FET. Inset) Field-effect mobility as a function of FET channel length, (b) Output characteristics of the FET. The transfer and output characteristics were scanned in both positive and negative directions in applied voltage... 

Figure 5.2 Comparison of the practical minimum for a specific drift region on-resistance of 4H-SiC UMOSFET with thermal SiOj gate dielectric to the theoretical values calculated for 4EI-SiC and Si as a function of blocking voltage. Caughey-Thomas mobility parameters for Si used in this calculation are taken from [12].

The Impact of Gate Dielectrics on the Electrical Functionality of Organic TFTs j 133... 

Fig. 2.19. (a) Scheme of a transparent field effect transistor based on ZnO [191]. The gate electrode consists of tin-doped indium oxide (ITO) and the gate dielectric is a multilayer of AECE/TiCE (ATO). (b) Output characteristics (drain-source current as a function of the drain-source voltage) for different gate voltages. The saturation current is about 530 rA at a gate bias of 40 V. From this output characteristics a threshold voltage of 19 V and a field-effect mobility of 27 cm2 V-1 s-1 were calculated [192]... 

In the following, a silicon nitride layer was deposited as the gate dielectric on a thermally oxidised silicon wafer. The nitride layer was re-oxidised to enhance the electrical stability. The silicon dioxide below the nitride film adopted the function of a buffer layer to reduce mechanical stress between the silicon and silicon nitride due to different thermal coefficients of expansion. To deposit the dielectric film, ammonia gas and triethylsilane were put into the process tube in a ratio of 1 5, at 800 °C and at a process pressure of 0.3 mbar. The thickness of the deposited dielectric film was about 75 nm in total. 

FIGURE 3.2.6 Titanium oxide core-polystyrene (TiOj-PS) shell nanoparticle gate dielectrics. Bottom graph shows particle size distrihntion of as-synthesized TiOj-oleic, and polystyrene functionalized TiOj-PS particles as determined by DLS. 

As with the source and drain electrodes, the composition and condition of the gate dielectric plays an important role in the performance of OFET devices and can also affect their functionality. 

Perhaps the best studied gate dielectric treatment is the application of silanes (e.g. octadecyltrichlorosilane or OTS) to thermally grown silicon dioxide. While this structure is limited in its utility in integrated circuits, it provides a well controlled system in which to study structure/function relationships that can then be extrapolated to more practical, but less controlled, integrated structures (e.g. PECVD or PVD deposited oxides). 

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