IC manufacturing

Figure 9 shows a simplified fabrication sequence for an oxide-isolated -weU CMOS process that illustrates many of the essential steps used in IC manufacture. These steps are as follows ... 

According to the international technology roadmap for semiconductors, chips with a wafer diameter of450 mm and a feature size of 0.05 /xm by 2011 will serve to decrease manufacturing costs [29]. In the integrated circuit (IC) manufacture process as shown in Fig. 21 [30], dielectric stacks have been formed by the ion etching on the coating of dielectric material formed on the silicon surface (Fig. 21 (a)). 

However, compared with a large amount of CMP studies for IC manufacturing, very few researches on CMP of hard disk substrate have been reported to date except some patents on slurries [101-107]. In these patents, the influences of slurry parameters, such as abrasive size, abrasive content, oxidizer content, and pH value on the polishing performances, and the CMP mechanism of disk substrate have seldom been involved. 

These operations are repeated again and again in different sequential order until the 1C fabrication is completed. At the same time, they are not the actual steps needed to form the individual dice. We will address these later on after we have described the individual operations used in performing each step in the IC manufacturing process. It is very important to distinguish between manufacturing operations and manufacturing steps. 

I think it is important not to always presume vendors of components are infallible— neither the IC manufacturers nor the discrete suppliers. We must look at any data with our own judgment and experience. I personally think Murata needs to revalidate their ESR data, or at least the design tool that generated the curves shown in Figure 4-9. 

Vassen R, Hathiramani D, Mertens J, Haanappel VAC, and Vinke IC. Manufacturing of high performance solid oxide fuel cells (SOFCs) with atmospheric plasma spraying (APS). Surf. Coat. Technol. 2007 202 499-508. 

From an IC manufacturing standpoint, two additional considerations fuel the drive toward dry etch processes. Relatively large volumes of dangerous acids and solvents must be handled and ultimately recycled or disposed of with wet etching or resist stripping techniques. Dry etching or resist stripping operations use comparatively small amounts of chemicals. 

One factor that is different from earlier transitions is the increased reliance IC manufacturers are placing on the capital equipment vendors to share some of the burden of the development costs associated with the transition to 300-mm wafers. Although this shift is complementary to the maturing capabilities of the equipment vendors, it is placing enormous strain on them. Few vendors are in a position to provide new tools, engineering support, and process support in multiple sites for upward of a year with only the promise of remaining in contention for the substantial capital equipment purchases that can justify such significant investment of resources. 

In CF4 plasma etching at 0.5 to 1 Torr pressure, the active species are neutral free radicals like F atoms and CF3 (28). Novolak resins have fairly strong CF4 plasma etch resistance (29), which, because of widespread use of the dry etching process, is one of the required features for resins used as resist materials for IC manufacturing processes. 

What is accomplished by adhesion promotion treatments in IC manufacturing should actually be referred to as wafer substrate preparation, and not adhesion. Adhesion in the structural sense, as experienced in airplane composite material parts attachment, is not accomplished by silane wafer processing treatments except for the PI applications discussed early in this paper. The term adhesion, as it is used here, refers to a more practical definition—that is, resist image adhesion. Nevertheless, this type of adhesion is essential to the huge international semiconductor business, and the early silane work of Plueddemann and others was essential to early wafer adhesion process development. 

This book will concentrate on the chemistry and fundamental chemical engineering principles needed for integrated-circuit (IC) manufacture. Integrated circuits are currently used in consumer items, such as hand-held calculators, digital watches, microwave ovens, and automobiles, and in microprocessors for communication, defense, education, medicine, and space exploration. Naturally, new application areas are continually being developed. 

Rework. Masking steps frequently have the advantage over other IC-manufacturing processes of being able to undergo wafer rework. Rework... 

Wet chemical analysis is especially useful to semiconductor IC manufacturers in the following five areas ... 

Another important microstructure in IC manufacturing process is shallow trench isolation (STI) that allows the effective separation of active devices and increase of packing densities. Figure 1.23 shows a schematic of an STI structure before and after polishing [51]. It is important for the dishing of the oxide in the trench and the nitride loss to be as low as possible. 

FIGURE 2.3 Key materials used in the IC manufacturing process (from Ref. 3). 

The advancements of microelectronics with its increasing device performance and decreasing structure dimensions, which recently fell below the 100-nm mark, follow the path given by Moore s law. In contrast, microfabrication deals with a broad range of structure dimensions between submicrometers and millimeters [7]. The main developments in CMP are traditionally connected to those in advanced IC manufacturing. In recent years, however, the CMP equipment and consumable communities have also paid close attention to microfabrication. It is recognized that MEMS-specific CMP processes require dedicated consumables [8] and optimized tool sets [9] due to their diversity in structure dimension and materials to be processed. 

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