Dual-in-line

Fig. lab. Some types of electronic connectors, (a) Receptacle for dual-in-line package (DIP) semiconductor integrated circuit, (b) Connectors for printed circuit boards having edge contacts two-piece connectors have male and female connector halves, one of which is attached to the printed circuit board. 

With the conventional technology, ICs are mounted individually in plastic or ceramic single-chip packages (SCPs), such as dual-in-line packages (DIPs) or chip carriers, and the SCPs are interconnected on printed wiring boards (PWBs). The number of pins on SCPs has increased significantly, and line widths on PWBs, like IC feature sizes, have followed a historical downward trend (2). However, the basic SCP-on-PWB approach has remained predominant. 

Figure 2. Cutaway view of a dual-in-line package. (Reproduced with permission from reference 27. Copyright 1986 Technical Publishing.)...

The earliest kinds of interconnection involved solder joints later, wire bonding and dual in-line (DIP) phenolic-molded packages were developed. In fact, the DIP continues to be the most commonly used package. In a DIP (see Figure 1) the IC chip (shown here encapsulated) is connected by wire bonding to the two rows of... 

Device encapsulation conditions are summarized in Table IV. Upon completion of the encapsulation, the devices molded at 150°C were post baked for 16 hours at 150°C, and those molded at 175°C were post baked at that temperature. After trimming, clipping, and forming, the IC s had their final dual in-line package shape. The leads were dipped in 63/37 Sn/Pb solder using a halide-containing flux (Alpha 200). 

For many years the standard package was the Dual In Line (DIP) and the plated through hole (PTH) glass... 

Over 95% of all the microcircuits made are packaged in plastic, usually a transfer moulded epoxy resin. Changes in packaging technology will occur away from the familiar PDIP (plastic dual-in-line package) to smaller SOT or chip carrier formats but plastics will continue to be the dominant packaging material for cost reasons. At the same time there is a need to improve the reliability of plastic encapsulated devices (PEDs) as they find further use in professional and certain military applications. 

Figure 1.7 Examples of dual-in-line packages (DIPs).

Adhesives are also tailored to meet specific requirements of the packaging or assembly technology used (Table 5.9). Thus, the requirements for single-chip packaging in hermetically sealed ceramic packages such as CERDIPs will be somewhat different from those of plastic dual-in-line packages (PDIPs) and plastic-encapsulated microcircuits (PEMs). 

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