Channel resistance

One of the most important issues preventing commercialization of power SiC MOSFETs so far is MOS channel resistance that results from the extremely low inversion channel mobility in 4H-SiC [19]. This problem may become especially significant in the case of 4H-SiC UMOSFETs, where the oxide-semiconductor interface is severely damaged by plasma etch when the trenches are formed. In general, there are two major approaches to minimize the channel component of on-resistance ... 

Since specific on-resistance of SiC DIMOSFETs is not dominated by the drift region but rather by MOS and JEET channel resistances, it would be very beneficial to increase channel packing density. To achieve that, three different approaches can be used ... 

In designing the accessories and choosing an injection and extrusion installation for low-pressure moulding1, it is important to evaluate the design procedure for determining the channel resistance to non-Newtonian liquid flow. Practically simple and convenient design procedures for pressure losses and hydraulic resistance of non-round channels for power liquids and liquids described by the three-parameter model may be found, e.g. in 68,69). 

The electrical current flows from the source, via the channel, to the drain. However, the channel resistance depends on the electric field perpendicular to the direction of the current and the potential difference over the gate oxide. Should this surface be in contact with an aqueous solution, any interactions between the silicon oxide gate and ions in solution will affect the gate potential. Therefore, the source-drain current is influenced by the potential at the Si02/aqueous solution interface. This results in a change in electron density within the inversion layer and a measurable change in the drain current. This means we have an ion-selective FET (an ISFET), since the drain current can be related to ion concentration. Usually these are operated in feedback mode, so that the drain current is kept constant and the change of potential compared to a reference electrode is measured. 

At this stage, a technique that would enable independent access to the channel and contact resistances is needed. Such a feature is offered by the transfer line method (TLM) [38-41, 89], a method adapted from a classical technique use to estimate contact resistance, and first developed for the amorphous silicon thin-film transistor [42]. The method consists of measuring the channel resistance for different channel lengths. The measured resistance is actually the sum of the channel and contact resistances. As long as the measurement is performed in the linear regime (small drain voltage) the channel resistance is proportional to L (see Eq. 1) and the width-normalized (Rx W) total resistance is given by ... 

An alternative method to TLM is the four-point probe, which consists of introducing into the conducting channel two additional electrodes [45, 46]. The current remains the same all along the channel and the voltage drop between these two additional electrodes is not affected by the contact resistance, thus giving access to the true channel resistance. Moreover, as shown in Fig. 1.14, the contact resistance at each side of the channel can now be estimated independently. 

The recovery time of a single channel after an event is determined by the rate at which the extracted charge can be replaced. For a typical 1 mm thick MCP of resistance 300 mft, the channel recovery time tc is of the order 20 ms (21, 23), where r c RcCc (Rc and Cc are the effective channel resistance and capacitance, respectively). So, the maximum event rate per channel is 50 counts/sec, and if this rate is exceeded, the channel does not recover fully between events and the gain drops as a consequence. Since an MCP has on the order of 105 - 106 channels, the overall counting rate can be very high (>106 counts/sec), provided no channel experiences more than —50 counts/sec. Some manufacturers (5, 6) provide MCP s with low channel resistance to reduce the channel time constant in applications which require high localized counting rates. 

The general features that ean be seen in Figure 19.14(a) and (b) show the I- V eurves for Array 1 and Array 2 respectively. The /- V curves of Array 3 are shown in Figure 19.15. All the curves have a similar shape but the values of the /- V curves of different contacts within the same array can deviate from each other by about 50%. This proves that the formation of reproducible top contacts is extremely difficult even if the contacts are formed on the same film under the same conditions. Within each array, the channel length between the contacts does not seem to have an influence on the /- V curve. This indicates that the contact resistance between the Au pad and the Pc film is dominating the overall resistance so that the channel resistance can be neglected. 

Figure 21.12 Source-drain current of a ferroelectric OFET without applied gate voltages, but after an applied gate voltage pulse of 73 V for 2 min. After application of negative voltage pulses, the channel resistance increases. After application of positive voltage pulses, the channel resistance decreases.

Figure 28.2 Spin FET switching concept. The top panel shows the hysteresis of two contact stripes with different widths. The magnetically softer stripe is assigned to the drain D and the other one to the source contact S. The bottom panel gives a scheme of the channel resistance...

Fig. 4. DHa6T contact and channel resistances as extracted from the relevant I-V curves.

Note that the voltage does not necessarily remain constant when or T is varied becanse the total Vsd voltage applied to the device is distribnted between the channel resistance, / ch> d the contact resistance, Rq, both of which vary with 1/ and T. Using the relationship o = enp, and n from Equation (2.1.2), we obtain for the contact-resistance-corrected channel mobility,... 

Yagi, I., Tsukagoshi, K., and Aoyagi, Y, Direct observation of contact and channel resistance in pentacene four-terminal thin-fihn transistor patterned by laser ablation method, App/. Phys. Lett., 84, 813, 2004. 

FIGURE 2.4.1 Schematic of an OFET showing equivalent resistances corresponding to the source contact resistance, the channel resistance, and the drain contact resistance. The total contact resistance is and the total device resistance is = R, + Rchannd-... 

This equation facilitates understanding of how the channel dimensions (L and W) affect the relative magnitudes of the contact resistance and the channel resistance. Note that the channel resistance scales as LIW but the contact resistance scales as l/W it does not depend on L. Consider two different OFET devices on the same semiconductor/insulator/gate substrate both have the same channel width (equal W), but the length of the channel of the second device is 10 times smaller than that of the first (L2 = Ej/10), as depicted in Figure 2.4.6(a). Both devices have equal contact resistances R because W is the same. But because the channel resistance scales with L/W (the source-drain current scales with W/L), the channel resistance of the second device is 10 times smaller than that of the first device. This means that contact resistance is potentially much more important in the shorter channel device because it contributes a larger fraction of the total resistance. 

Equal contact resistances Device 2 has a lower channel resistance (by lOX)... 

Equal channel resistances Device 4 has a lower contact resistance (by 2X)... 

FIGURE 2.4.6 (a) Decreasing the channel length (L) at constant channel width (W) leads to lower channel resistance and increased relative contact resistance, RJRjgp (b) Increasing the channel size at constant (WIL) decreases the relative contact resistance. 

Since the total resistance a charge carrier experiences dining its journey from source to drain (i.e., is the sum of the contact resistance and the channel resistance... 

Again, it is not necessarily the value of the contact resistance of an OFET that is significant, but rather its value in comparison to the channel resistance, hi the linear regime, the scaled OFET channel resistance Rckmmi is given by ... 

FIGURE 2.4.12 Evolution of the source and drain contact resistances (Rg and as well as the channel resistance for a pentacene OFET with increasing carrier density (Ny ee), calculated from the capacitance of the AljOj dielectric layer and the gate voltage. L = 100 dm, W = 1000 J,m. 

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