Assembly process Underfill

Li Z, Lee S, Lewis B, Houston P, Baldwin D, Stout E, Tessier T, Evans J. No flow underfill assembly process development for fine pitch flip chip silicon to silicon wafer level integration. Advancing Microelectronics. July/August 2010 20-25. 

However, several of the new low-k materials are porous and structurally weak. This poses several challenges in the back-end assembly process poor adhesion, residual stresses in the inner layer dielectric (ILD) films, and so on. In addition to optimizing and better monitoring the wafer-sawing process, the effect of chip-to-package interactions also needs to be characterized.The choice of material set, underfill, substrate, hd material, and so on could impact the reliability of the low-k dielectric. 

Some adhesive materials and processes are used across many apphcations. For example, adhesives are used to attach bare die, components, and substrates in assembling commercial, consumer and aerospace electronic products. Adhesives are also widely used for surface mounting components onto interconnect substrates that serve numerous functions for both low-end consumer products and for high rehability applications. Underfill adhesives are used to provide stress relief and ruggedize the solder interconnects for almost all flip-chip and area-array devices, regardless of their function as integrated circuits. 

Alternate approaches that eUminate the capillary-flow underfill process currently used by electronics assemblers, involve pushing the problem back to the wafer stage. One process, wafer-level underfill (WLU) (Figure 5.12), consists of applying the underfill material to a bumped wafer and then B-staging the underfill. The wafer is then diced and the die are positioned on corresponding connection pads on an interconnect... 

In a similar process, known as polymer-film interconnect (PFI), an insulative thermoplastic film is laminated over the devices at the wafer stage, and vias are opened over the bonding pads using a laser. At that point, either the normal solder bumps can be formed or a silver-filled conductive adhesive can be stencil printed into the vias to form polymer bumps. After printing, the epoxy is B-staged and the flip-chip devices are diced. In assembly, the devices are heated to a temperature that completes the cure of the B-staged bumps and simultaneously reflows the thermoplastic underfill material. 

The use of underfill adhesives has resulted in the development of the draft version of J-STD-030, Guideline for Selection and Application of Underfill Material for Flip Chip and Other Micropackages. The guideline covers critical material properties for underfill materials to assure compatibility in underfill applications for reliable electronic assemblies as well as selected process-related qualification tests such as thermal cycling. Table 6.9 summarizes selected materials requirements for underfill adhesives from the proposed JEDEC J-STD-030. ... 

Underfill. An underfill is then injected into the gap between the chip and chip carrier and then cured to complete the flip chip process. The function of the underfill or encapsulation as it is sometimes referred to is to provide mechanical integrity and environmental protection to a flip chip assembly. Studies have demonstrated that both thermoset and thermoplastic ICAs can offer low initial joint resistances of less than 5 mS2 and stable joint resistances (Au-to-Au flip chip bonding) during all the accelerated reliability testing listed in Table 1. The reliability results have indicated that there is no substantial difference in the performance of thermoset and thermoplastic bumps and both types of polymers apparently offer reliable flip chip electrical interconnections (53). 

For flip chips on organic substrates with an underfill, a two-part process profile is often used in which the thermal profile associated with solder reflow and attach is modeled in the first part, and the assembly is then simulated to be cooled down to room temperatme. In this case, the entire assembly is assumed to be stress-free at the... 

In assemblies utilizing lead-free solder, work must be performed to ensure that the flux, underfill, component, and PCB system is compatible. For an underfill to be effective, the underfill must bond to the die and chip carrier surfaces. Current underfill systems are designed to be compatible with flux systems for Sn-Pb solder, which may not be the case with a lead-free solder. An additional concern for underfilled systems is exposure to reflow temperatures. For example, flip-chip BGA components may experience several reflow cycles after the underfill step. The higher processing temperatures experienced during lead-free soldering can have detrimental effects such as delamination of the underfill material from the chip carrier or die surface. 

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