Flip chip process

The problem of cross-talk between adjacent photodiodes and the problem of different thermal expansion coefficients between a silicon substrate and an HgCdTe substrate are approached in JP-A-63281460. A detector is made up of HgCdTe wells, comprising photodiodes, formed in a CdTe substrate. The detector is bonded to a silicon substrate by a flip-chip process, and finally the CdTe substrate is etched away. 

An HgCdTe layer 2, comprising photodiodes 3, is formed on a first side of a CdTe substrate 11. The detector is bonded to a silicon chip 7 by a flip-chip process. A reflection preventive film is formed on a second side, opposite to the first side, of the CdTe substrate. The film is formed by a cyclotron resonance plasma CVD method by introducing nitrogen, nitrous oxide and silane as reaction gas. The thickness of the film is selected so that the reflectivity is minimized for radiation having a wavelength to be detected by the photodiodes. 

Finally, the exposed photodiodes are connected to a CCD by the use of connection bumps in a flip-chip process. 

P-type HgCdTe well regions 5 are formed in a CdTe substrate 1. Photodiodes are created by forming n-type regions in the p-type wells. The p-type well regions 5 are connected to each other by an Au film 21 forming a common electrode. The n-type regions are connected to input diodes 10 prepared in a silicon substrate 9 by indium columns 12 in a flip-chip process. The space between the CdTe substrate and the silicon substrate is filled with an epoxy resin 22. 

A cold shield layer which is formed on a silicon substrate is introduced in JP-A-62272564. The substrate is bonded by a flip-chip process to an HgCdTe detector substrate. 

In JP-A-63170961 a shape-memory alloy structure is used to release mechanical stress generated in connection bumps during a flip-chip process comprising pressure bonding. 

A silicon substrate 29 equipped with connection bumps 30 is connected to the photodiodes by the use of a flip-chip process. 

N-type layers are formed in recessed regions formed in a p-type HgCdTe substrate. Indium bumps 16 are formed in the recessed regions and on corresponding input regions of a silicon substrate 17. The two substrates are joined in a flip-chip process in which the corresponding bumps will meet in the recessed regions. 

Bacher B. Flip-chip Process Guidelines and Considerations, Semicon West, San Jose, CA Jul. 1999. 

Bacher, B., Flip-Chip Process Guidelines and Considerations, Dexter Technical Paper (Nov. 1999)... 

Protective Chip Pad Layer. As with virtually all flip chip processes, the A1 bond pads must be protected to eliminate the formation of nonconductive aluminum oxide. This ensures a low and stable resistance at bond-bond pad interface. The PFC process utilizes an electroless plating technique, using Ni/Au or Pd, to cover the A1 bond pads prior to polymer bumping. The typical metal thickness is 0.5-1.0 pm for Pd and 3.0-5.0 pm for Ni/Au. 

Underfill. An underfill is then injected into the gap between the chip and chip carrier and then cured to complete the flip chip process. The function of the underfill or encapsulation as it is sometimes referred to is to provide mechanical integrity and environmental protection to a flip chip assembly. Studies have demonstrated that both thermoset and thermoplastic ICAs can offer low initial joint resistances of less than 5 mS2 and stable joint resistances (Au-to-Au flip chip bonding) during all the accelerated reliability testing listed in Table 1. The reliability results have indicated that there is no substantial difference in the performance of thermoset and thermoplastic bumps and both types of polymers apparently offer reliable flip chip electrical interconnections (53). 

Figure 32 Process for the fabrication of polymer bumps (a) bumping sites delineated by screen printing silica-filled polyimide paste (b) silver-filled epoxy resin composition is printed over the metal pads (c) polymer bumps are formed by screen printing a second layer of conductive epoxy. Steps (d) and (e) sketch the subsequent flip chip process using a layer of conductive adhesive coated on the substrate bonding pads.

Figure 40 Flip chip process using gold stud bumps and epoxy conductive adhesive (1) silicon substrate (2) silicon dioxide (3) metal bonding pad (4) silicon nitride passivation (5) stud gold bump (6) silver-filled epoxy adhesive (7) metal bonding pad (8) printed...

A low-cost flip-chip process using stud bumps with an NCA paste that does not require underfilling of the die was developed [123]. It was found to be particularly suitable for organic... 

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