Wafer carriers requirements

Aside from the basic approach to polishing, the most critical component of a CMP tool is the wafer earrier. As with CMP tools, wafer carriers have evolved from roots in lens grinding and in the silicon wafer polishing industries to meet requirements specific to polishing silicon-based integrated circuits. 

A real-time measure of the coefficient of friction is essential to a well-controlled CMP process. It is possible that this could be done by a coefficient of friction (COF) probe, mounted on the CMP tool, which could feed back observed values to the process control computer. There are several requirements in making a measurement that truly reflects the process conditions, the first of which is that the probe surface material should be the same as the wafer surface material (so the COF you read reflects what the wafer experiences). That situation, of course, is already inherent in the wafer carrier head, but the signal-to-noise ratio in trying to read the COF off the wafer carrier head is often too great to be of use. 

Many CMP processes are performed on single wafer rotary polishers. The wafer is held top surface down in a rotating wafer carrier and is pressed against a rotating polymer pad on which a chemically active slurry is dispensed. The removal rates of various materials depend on the applied pressure, the kinematics, and on the chemistry and particle content of the slurry. Different materials and combinations of materials on the wafer surface require different slurries in order to achieve the desired removal rate, rate selectivity between exposed materials, and the desired uniformity, surface quality, and defect count. The material properties and surface stmcture of the pad also affect the latter three measures. Pads and slurries are therefore critical elements of the process and together constitute a large fraction of the cost of IC manufacturing (Moinpour, 2007, p. 27). 

The second additional requirement of CMP carriers is that they must allow the tool to polish a broad range of films with varying amounts of film stress. Film stress causes the wafer to deform, altering the pressure distribution across the wafer during CMP. These pressure variations cause characteristically fast or slow polishing across the wafer. This picture is further complicated by the time dependence of this stress during the course of the polish cycle. 

Systematic diffusion experiments were also conducted with self-supported zeolite wafers (7-14 mg cm ) which were activated at 10 Pa and 675 K for 1.5 h. Prior to contact with the sorbate, the IR cell was filled with dried helium as a carrier gas. Subsequently, one or two components (benzene or ethylbenzene), carried by helium bubbling through thermostatted saturators, could be admitted. A system of mass-flow controllers allowed for an independent change of the partial pressures while the total pressure could be kept constant [22]. The time required to pass the sorbate from the inlet valve to the place of the zeolite wafer was about 4 s. IR spectra were obtained in intervals as short as 0.37 s. 

An existing industrial application of the ultrapure hydrogen separated by dense Pd alloy membranes is for electronics industry. In the fabrication of silicon chips, hydrogen acts as a carrier to transport small quantities of vaporized chemical compounds required to "dope" the chip to the surface of the silicon wafer [Philpott and Coupland, 1988]. The hydrogen used must be of a very high purity. The membrane units are used not only for gas purification but also for hydrogen recovery from hydrogen>rich gas streams. 

Tablets or wafers. Compressed soluble discs containing inert, edible carriers and suflBcient ascorbic acid to meet the ascorbic acid regulatory and (or) processing requirements of a given quantity of food. The tablet added to... 

Several conditions must be met in order to make the SPV analysis tractable. First, the wafer must be much thicker than the minority carrier diffusion l gth. Generally the requirement of wafer thicknes 4L is sufficioiL It is furthermore desirable that the scr width be small compart to L, i.e. W Lj. Additional restrictions are placed on the optical absorption coefficient a. The conditions aW l and thickness xa l should be met. Lastly the condition of low-level injection should be satisfied. 

A heavily doped wafer (p , ean be readily anodized in a variety of HF-based electrolytes to form mesoporous silicon. A lightly doped wafer (p , n , and majority carrier concentration <10 cm ) generally requires an ohmic contact to be made on the backside, either by ion implantation or by depositing a thin metal layer such as A1 (for p-type wafers) and Au-Sb (for n-type wafers) mechanical abrasion of the backside of the wafer, before metal deposition, can often improve the ohmic contact. 

Once the bumped wafers are diced, chips are picked from the wafers, flipped over, and then placed on and bonded to chip carriers. Different process procedures are utilized to bond thermosetting polymer bumps to similar thermoplastic bumps, as noted in Figure 13. Final processing involves a heat cure for thermosetting bumps, while thermoplastic bump connections only require in a few seconds under heat and pressure to melt the thermoplastic. 

The underlying porosification mechanism is still widely debated. AH currently accepted theories require the presence of excess positive carriers (holes) at the siUcon surface for etching to occur. In aqueous solution, two competing dissolution pathways are observed (Figure 11.2), both of which initially require the replacement of an H atom at the siUcon surface with an F ion from solution. This step constitutes the electrical part of the etch, as the hole necessary to neutraUze the SiF bond must be supplied by the siUcon wafer. In the second dissolution step... 

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