Thick silicon film

Next, we fabricated TFTs whose ULD, channel Si, and gate dielectric were all solution-processed. The fabricated TFTs (TFT-4, 5, and 6) have similar solution-processed 50-nm-thick silicon films,1011 the details of which are described in Section 5.4. In addition, TFT-4 (n-channel) and TFT-5 (p-channel) have the SP-Si02 as both ULD and gate dielectric, which are fabricated using... 

Fig. T.4. Schematic drawing of the ribbon growth on substrate (RGS) process, typical of type II technology. Preheated substrates are transported at ribbon pulling speed underneath a casting frame filled with liquid silicon. The crystallisation heat is removed into the colder substrate and a 300 pm thick silicon film is grown. After the silicon ribbon is removed, the substrate is re-used in the process...

The function of a molecular sifter is most often obtained using thin or thick silicone films (Sn02>, the very small size of the pores obtained with this kind of material favor the crossing of hydrogen. 

The substrate employed is cut from a silicon or sapphire (SOS) wafer with a 0.6 m thick silicon film grown by chemical vapour deposition on the 350 m thick sapphire. The samples being generally used are then bombarded at room temperature with Si ions of different energies (40, 120, and 320 keV) and different doses (0.2 10 0.6 10 and 2.2 10 cm in order to achieve a homogeneous distribution of defects across the thickness of the Si film [148]. The created defects act as trapping and recombination centres and effectively reduce the fre-carrier lifetime... 

Yet another alternative is the thin-film solar cell. This cannot use silicon, because the transmission of solar radiation through silicon is high enough to require relatively thick silicon layers. One current favourite is the Cu(Ga, InjSci thin-film solar cell, with an efficiency up to 17% in small experimental cells. This material has a very high light absorption and the total thickness of the active layer (on a glass substrate) is only 2 pm. 

Thick Siloxane Films from Tetraethoxysilane on Silicon... 

Fig. 9.9 The calculated mode profiles for (a) a surface plasmon mode propagating along a 50 nm thick Au film, with an excitation wavelength of X 800 nm (note the plasmon field amplitude within the Au film is multiplied by 10 for clarity), and (b) a silicon PWEF waveguide with silicon core thickness of 220 nm, for an input wavelength of X 1550 nm...

The dissolution of PS during PS formation may occur in the dark or under illumination. Both are essentially corrosion processes, by which the silicon in the PS is oxidized and dissolved with simultaneous reduction of the oxidizing species in the solution. The material in the PS, which is distant from the growing front is little affected by the external bias due to the high resistivity of PS and is essentially at the open circuit potential (OCP). Such corrosion process is responsible for the formation of micro PS of certain thickness (stain film) in HF solutions containing oxidants under an unbiased condition. 

For these conditions, Armaou and Christofides [4] determine the thickness profile, in Fig. 10.4-3, for the amorphous silicon film after 60 s, when the average thickness reaches 500 A. When characterizing the non-uniformity of the film, the sharp increase in thickness calculated near the outer edge of the wafer is assumed to be due to the boundary conditions, which assume step changes to zero concentrations at the edge. Brass and Lee (2003) disregard the profile from r = 3.6 to 4 cm, and compute the non-uniformity as ... 

According to the macropore formation mechanisms, as discussed in Section 9.1, the pore wall thickness of PS films formed on p-type substrates is always less than twice the SCR width. The conductivity of such a macroporous silicon film is therefore sensitive to the width of the surface depletion layer, which itself depends on the type and density of the surface charges present. For n-type substrates the pore spacing may become much more than twice the SCR width. In the latter case and for macro PS films that have been heavily doped after electrochemical formation, the effect of the surface depletion layer becomes negligible and the conductivity is determined by the geometry of the sample only. The conductivity parallel to the pores is then the bulk conductivity of the substrate times 1 -p, where p is the porosity. 

A silicon wafer with anisotropically KOH-etched openings was used as shadow mask. The shadow mask is accurately positioned with the help of an optical microscope and fixed using a custom-made wafer holder. A 50-nm-thick TiW-film is deposited by sputtering through the shadow mask. This film serves as adhesion layer and diffusion barrier and covers the rough surface of the CMOS-Al-metallization. A Pt-layer with a thickness of 100 nm was sputtered on top of this TiW-layer. 

At ordinary temperatures, the metal surface is coated with a very fine thin amorphous film of its dioxide, about 2 to 3 nm thick. Silicon combines with oxygen forming innumerable silicates. A few silicates have been mentioned above. 

The formation of amorphous silicon films by electrodeposition from non-aqueous solutions have also been studied [18, 19]. For example, a flat homogeneous silicon film of about 0.25 pm thick can be deposited from 0.2 M SiHCl3-0.03 M Bu4NBr-THF bath on the cathode of Pt, Au, Cu, GC, ITO, etc., although small amounts of impurities (O, C, Cl) are contained. Their use in photovoltaic or photoelectrochem-ical solar cells are promising, although there are still many problems to be solved. 

Fig. 9. Negative resistance phenomena, a) 100 A thick polyethylene single crystal using Pt Catswhisker and Copper substrate [after van Roggen (725)], b) 70S A thick silicone polymer film at 300° K, c) 705 A thick silicone polymer film at 4° K [after Mann (726)]...

When considering a production reactor, we first assume that the requisite quality film can be made at least one at a time. The challenge then is to develop a reactor that is capable of acceptable wafer throughput with each wafer having film thickness within an acceptable tolerance. For example, we may want a reactor that can process 30 wafers per hour with thickness uniformity on a single wafer, and from wafer to wafer, of 5%. In addition, we may impose other conditions such as permissible number of particles per cm2, or for epi silicon films, the allowable number of defects per cm2. When we speak of wafer throughput, we are concerned with the actual cost per wafer for this process step. 

A typical surface profile is shown on the video display. Vertical resolution of 5 A and horizontal resolution of 400 A is claimed. As long as the deposited film can be etched off the substrate without etching the substrate, this technique can be used for any thin film. Its primary utility is for R D studies, as it is clearly not a production technique. The only film for which it is not suited is an epi silicon film on a single-crystal silicon substrate. A technique for measuring the thickness of these films will be described in the section on Infrared Spectroscopy. 

As noted earlier in Chapter 3, epitaxial silicon films deposited by CVD can be affected by autodoping. If diffusion of the doping species is excessive, the film is not a useful one. Therefore, quite a lot of effort has been spent to accurately measure the distribution of dopant through the film thickness. 

Furthermore, a series of ZnO B films with various doping levels has been deposited, and the thickness of the films has been adapted so as to keep the sheet resistance close to 10Qsq. This means that the thickness of the ZnO films was increased as their doping level was decreased. For this series, the highest FoM(A) of LP-CVD ZnO films on the whole visible spectral range has been obtained for the 6 j,m-thick undoped film. This prediction has then been experimentally confirmed the same microcrystalline silicon solar cell was deposited on this ZnO series, and the highest photogenerated current... 

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