Silicon on-insulator structures

Japanese researchers are ahead of their U.S. counterparts in the application of laser and electron beams and solid-phase epitaxy for the fabrication of silicon-on-insulator structures. 

C. Oules, A. Halimaoui, J. L. Regolini, A. Perio, and G. Bomchil, Silicon on insulator structure obtained by epitaxial growth of silicon over porous sihcon, J. Electrochem. Soc. 139, 3595,... 

Takai H, Itoh T (1986) Porous silicon layers and its oxide for the silicon-on-insulator structure. J Appl Phys 60 222-225... 

R Nuryadi, Y. Ishikawa, and M. Tabe, Formation and ordering of self-assembled Si islands by ultrahigh vacuum annealing of ultrathin bonded silicon-on-insulator structure, Appl. Surf. ScL, 159, 121-126 [2000]. 

SOI (silicon on insulator) structures, 329 sol-gel coatings, mechanical properties of abrasion, 308 adhesion, 306 fracture toughness, 305 hardness, 302 pencil hardness, 305 stress, 297... 

Figure 11.11. Integration of nanowire photonics with silicon electronics. Schematic illustrating fabrication of hybrid structures. A silicon-on-insulator (SOI) substrate is patterned by standard electron-beam or photolithography followed by reactive ion etching. Emissive NWs are then aligned onto the patterned SOI substrate to form photonic sources. [Reprinted with permission from Ref. 59. Copyright 2005 Wiley-VCH Verlag.]...

Progress in semiconductor processing has evolved in a number of substrate materials, pre-destined for the use in micro structured devices, such as Silicon, Silicon-on-Insulator (SOI), Silicon Carbide and Gallium Arsenide [1]. 

Substrates The substrates in microelectronics are mainly Si wafers. For mobile applications, silicon-on-insulator (SOI) wafers increasingly replace bulk Si wafers and for very specific high-frequency applications, III-V compound semiconductors (e.g., GaAs) are used. The majority of substrates in microfabrication are Si wafers, but metal, glass, and ceramic substrates are also common. Particularly when using glass, quartz, and ceramic wafers in CMP processes, it has to be taken into account that they are brittle and easy to break. The situation is worse when the material is also under stress induced by deposited layers. For applications where the backside of the wafer has to be structured (e.g., in bulk micromachining), double-side polished substrates are employed. 

Moutanabbir O, Reiche M, Hahnel A, Erfurth W, Motohashi M, Tarun A, Hayazawa N, Kawata S (2010) UV-Raman imaging of the in-plane strain in single ultrathin strained silicon-on-insulator patterned structure. Appl Phys Lett 96 233105... 

Silicon-on-insulator (SOI) structures are widely applied in microelectronics. The SOI structures are usually produced by oxygen implantation into Si followed by post-implantation annealing up to 1600K and above (HT) [1], Processing of Si implanted with oxygen (Si 0) at enhanced hydrostatic pressure and 1500 K has been reported to result in the formation of specific layered structures with strongly HP-dependent quality of the SiOx/Si interface [2-4]. 

Another type of integrated micromachined structure different from the anchored polysilicon surface films occurs by adding the micromachined structure to the wafer after the IC is created by plating or film deposition. Texas Instruments DLP technology with aluminum metal is the most well known example [3]. However, these types of structures are not used in large-scale automotive production. Another class of micromachined devices is made from silicon-on-insulator (SOI) components and could easily be described as surface micromachined, since they have mechanical structures on the surface. These devices use the buried oxide of the bonded wafer as the sacrificial layer [6]. A similar structure created by epitaxial deposition of silicon over oxide produces a polysilicon structure [7]. Figure... 

Fig. 5.2.4 Examples of types of surface micromachined structures a aluminum multimetal mirrors b polysilicon epi-over-oxide c nickel metal d silicon-on-insulator...

A nanophotonic level. Fabricated in silicon on insulator with the appropriate device structure... 

Silicon Micromachining, Fig. 9 Scanning electron microscope (SEM) photograph of comb-drive structure in SOI (silicon-on-insulator) wafer fabricated using DRIE and surface micrranachining... 

The benefits of modifying EIS structures with LbL films to achieve biosensors with improved performance was also reported by Abouzar et al., who observed an amplification of the signal response upon alternating layers of polyelectrolytes and enzymes as gate membranes on the p-Si-Si02 EIS structure [99]. A new variant of EIS sensors has been produced, which comprised an array of individually addressable nanoplate field-effect capacitive biochemical sensors with an SOI (silicon-on-insulator) stmcture to determine pH and detect penicillin. It also allows for the label-free electrical monitoring of formation of polyelectrolyte multilayers and DNA (deoxyribonucleic acid)-hybridization event [100]. 

Another limitation is the need to isolate devices from each other (Brews, 1990 Chen, 1990, Einspruch and Gildenblat, 1989 Pimbley et al., 1989 Wolf, 1995), so that their actions remain uncoupled by parasitics. As isolation structures are reduced in size to increase device densities, new parasitics are discovered. A solution to this problem is the manufacture of circuits on insulating substrates, silicon-on-insulator... 

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