Silicon etched-through

Fig. 7 Schematics of a nanometer scale M-A-M diode (not drawn to scale in relative thickness). Top schematic is the cross section of a silicon wafer with a nanometer scale pore etched through a suspended silicon nitride membrane. Middle and bottom schematics show a Au/SAM/Au junction formed in the pore area. (Reprinted with permission from [30])...

FIGURE 3.6. (a) Cross-sectional schematics of a silicon wafer with a nanopore etched through a suspended silicon nitride membrance. SAM is formed between sandwiched Au eletrodes in the pore area (circled), (b) I(V) characteristics of a Au-2 -amino-4-ethynylphenyl-4-ethynylphenyl-5 -nitro-1 -benzenethiolate-Au (chemical structure shown below) molecular junction device at 60 K. The peak current density is 50 A/cm2, the NDR is 2400 pQ. cm2, the peak-to-valley ratio is 1030 1. [Adapted from Ref.30 Chen el al., Science 286, 1550-1552 (1999).]... 

The rapid mixer is composed of layers that are fabricated separately and then assembled together. The main four channel device, represented by the cartoon of Fig. 12.2, is etched through a 1-mm-thick silicon wafer using an anisotropic Bosch process RIE (Unaxis 770, Unaxis). The depth of this etch requires a thick mask. We use a 7 pm layer of PECVD silicon dioxide (GCI PECVD Group Sciences Incorporated, San Jose, CA). This mixer is sandwiched between two 100 pm thick poly(dimethylsiloxane) (PDMS) layers (Duffy et al, 1998), which contain channels in a T configuration. 

In a second embodiment, a masking layer having windows 46 is formed on a thinned wafer of p-type HgCdTe. Holes 48 are etched through the wafer in the regions inside the windows by ion etching. N-type zones 49 are developed under the windows and along the walls of the holes. The n-type zones are connected to input studs of a silicon circuit via a deposited metal layer 50. The holes may be filled with a reinforced epoxy resin to perform the same function of connection. 

In an alternative embodiment, channels 22 are etched through the detector layer 16 and into the transparent substrate 14 to a depth slightly exceeding the required thickness. The detector array portion and the silicon circuit 12 are bonded together by the aid of indium bumps 18, and an epoxy material 20 is back-filled into the space between the detector array portion and the read-out chip. 

Photolithography and DRIE etching through the silicon wafer... 

The unwanted Si is etched away and contact holes, "denoted by A in Fig. 3, are etched through the silicon for connecting the drain contact to the ITO pads. The top electrode configuration, S and D, is then formed from the... 

Technological features of nanoprofiling of silicon protected by a solid mask made of porous aluminum oxide are considered. It is shown that the method based on bombarding structures with accelerated neutral atoms (in particular, argon atoms) is efficient for etching through this mask. 

The etch rate of anodic oxide can be determined by methods similar to those for thermal oxide or deposited oxides. It may also be estimated from the anodic current of the oxidized electrode. The anodic i-V curve of a silicon electrode typically shows a passivation-like peak above which the dissolution occurs through a two-step process the formation of oxide film followed by the chemical dissolution of the oxide. The steady-state anodic current measured at an anodic potential above the peak potential indicates the dissolution rate of the anodic oxide. Thus, the passivation current, /p, listed in Table 5.5 can be used for estimation of the etch rate of the oxide film formed at the anodic potentials. (A current density of 1 mA/cm corresponds to a silicon etch rate of 3.1A/S or to a silicon oxide etch rate of about 7 A/s.) For example, in 1% HF solution, ip is 5mA/cm, and thus the etch rale of the oxide film formed at a potential anodic of the first current peak is about 35 A/s. hi 2M KOH solution at room temperature, ip == 0.002mA/cm equivalent to an etch rate of about 0.014 A/s. These numbers appear to be in general agreement with the data in Table 4.1. 

Heschel M, Boustra S (1997) Conformal coating by photoresist of sharp corners of anisotropi-cally etched through-holes in silicon. Tech Dig Transducers 97, vol 1, pp 209-212... 

Contact cuts were plasma etched through the polyimide (using a photoresist mask) and buffered HF was used to etch the silicon dioxide underneath. After aluminum was deposited and patterned, both test and control wafers were sintered in forming gas at 400°C for 10 minutes. A CPI strip was fabricated beside each FET with four aluminum contacts to allow CPI 4 point conductivity measurements. 

A silicon wafer that has one surface oxidized to a controlled depth is coated (on the oxide surface) with a photoresist, such as poly(vinyl cinnamate), to produce a thin and uniform coating several micrometers thick when dry. Exposure to UV light through a mask insolubilizes part of the polymer. The uncross-linked polymer is washed off solvents. The bare substrate parts that thus reappear are etched through the oxide layer down to the silicon layer by a fluoride solution in water or by a plasma that contains reactive ions. 

Ozone is a god target reagent for microreactor applications since it is toxic, difficult to handle and very reactive. A silicon-etched 16-channel (600 (tm x 300 pm x 22.7 mm) microreactor covered with Plexiglas was used for oxidation of 1-decene into nonanal with quantitative conversion and selectivity [20]. This reaction proceeds in fact through the formation of the very reactive intermediate ozonide, which formally results from [3 + 2] addition of O3 to the C=C bond. A consecutive reduction step with P(OEt)3-EtOAc is required to yield the aldehyde. The reaction time is as short as 0.32 s. From the published data, a daily production of ca. 1600 g of nonanal per day may be obtained, which is well suited for preparation in fine chemistry. 

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