Pixel clock

Dedicated TCSPC electronics is used in all practical TCSPC-FLIM implementations [21, 22]. There are several issues that should be noted. First of all, the lifetime acquisition has to be synchronized with the scanning of the confocal or multiphoton microscope. To this end, the pixel clock and often the line and frame synchronization signals of the scanning microscope are used. 

Fig. 3.10 Image acquisition by synchronising the recording with an external scanner. Data acquisition is s)mchronised with the scanning via the frame clock, line clock, and pixel clock pulses. For each detector, a stack of images for consecutive times in the laser pulse sequence is built up...

The sequeneer is configured as a scanning interface. It contains two counters, X,Y, for the x and y location in the scanning area. Synchronously with the scanning action, the sequencer counts through x and y. Synchronisation is achieved by the sean eloek pulses, frame clock, line clock, and pixel clock. The sequencer can work either in an active mode, i.e. control a scanner, or in a passive mode, i.e. be eontrolled from a free-running scanner. 

A second requirement is that the scan clocks (i.e. a frame clock, a line clock, and a pixel clock) are available from the scan controller of the microscope. This is rarely a problem in modem scanning microscopes, which usually make the scan clocks available through an external connector. 

Then the sampled data is multiplexed onto a higher speed bus for the data acquisition system. The multiplexed bus, OUTD in the example, generally has a latch. This is used to provide stable data on the active edge of the system pixel clock. Almost all systems use the rising edge of the system pixel clock to latch the digital data to the acquisition electronics. If you examine OUTD closely, you will notice that the pixel... 

The other bottleneck is the acquisition speed of the frame grabber interface. This frame grabber interface must accept data at the incoming pixel clock rate, which includes overhead of dead pixels both in column and rows along with reset and integration time if needed - see Table 8.2. 

Add system clock signals needed for the acquisition system (system FSYNC, system LSYNC, and system Pixel Clock). 

With proper design, fabrication and clocking, most of these negative aspects can be overcome, but there are usually some bad columns due to blocked columns or hot pixels. There are many positive aspects of charge transfer, giving the CCD some very good and unique attributes vis-a-vis an infrared detector ... 

In both cases the data acquisition in the TCSPC channels is synchronised with the scanning by clock pulses from the scan controller. It must, however, be taken into account that the length of the lines of the scan varies since the return points of the scan are controlled by the detector overload signals. Therefore, the scan software must store the positions of the return points and the number of pixels between. These positions are used later to adjust the lines horizontally. 

---