MOSFET transconductance

According to the scaling rules, the MOSFET transconductance is expected to remain constant if both the lateral and vertical device dimensions are reduced by the same scaling factor A. For a short-channel MOSFET, the saturation current Idsat may indeed be expressed as... 

Figure 13.14. Bending tests on three-layer stacks of Si, GaN, and SWNT devices supported by a plastic substrate, (a) Images of the automated mechanical stages used to bend the system, (b) Normalized transconductances (gm/gom) of devices in each layer after bending (to a 3.7-mm radius) and unbending (to a flat state) the devices several thousand times, (squares ps-Si MOSFETs circles SWNT TFTs triangles ps-GaN HEMTs.) (Reprinted with permission from Ref. 42. Copyright 2006 American Association for the Advancement of Science.)...

From the transconductance expressions we see that the first (eq. 15) is linear with Vds and the second (eq. 16) is related to both MOSFET gate voltage Vgs and its threshold voltage Vt- In both cases Cox plays an important role. In fact in order to increase the sensitivity, the gate oxide thickness should be as thin as possible. gm,SAT, according to equation 16, depends on Vt and it is known that Vt depends on Vfb-, the flat band voltage, according to ... 

The models for the MOSFETs have tolerances in their threshold voltages and transconductances. The models for the MOSFETs are given below ... 

The ratio of the drain current to the gate voltage is defined as the transconductance g of the mosfet. It is expressed in mhos, that is, ohm spelled backward. Nowadays however, mhos is being increasingly called Siemens, or S. ... 

Wong, H.-S. et al., Modeling of transconductance degradation and extraction of threshold voltage in thin oxide MOSFETs, Solid-State Electron., 30, 953, 1987. 

The first SiC MOSFETs were fabricated by Suzuki et al [1] in 3C-SiC. At the present time, SiC MOSFET research is carried out by several groups, including Cree Research [2-4] and Westinghouse [5]. Enhancement mode and depletion mode (3-SiC MOSFETs have been fabricated by Palmour et al [3]. Enhancement mode devices with 5 pm gate lengths had a maximum transconductance (gm) of 0.46 mS mm 1 at room temperature (see FIGURES 1 and 2). The devices were operational up to 823 K. 

Recently, Cree Research Inc. reported on the first p-channel 6H-SiC MOSFET [6]. The device structure and output characteristics are shown in FIGURES 8 and 9, respectively. The device current and transconductance are very small (76 pA mm 1 at 40 V of drain bias and 16 pS mm 1, respectively, for a 7 pm gate length device). The performance of this device was limited by a large parasitic series resistance. Nevertheless, even these preliminary results show the feasibility of SiC CMOS technology, capable of operating at elevated temperatures. 

SiC inversion-mode MOSFETs have been reported by Davis et al [15]. The transconductance in this case was 0.27 ms mm 1 with a gate voltage of 24 V. This device operated well... 

By its working principle, the MOSFET amplifies the input signal Vq with an intrinsic gain given by the transconductance gm- In the linear region where Vq is small and in the saturation region... 

MEH-PPV thin strip FETs [32], DNA—templated SWNT FETs [99], and some other lowdimensional structures [1]. To evaluate the field-effect mobility (/afet) of polymer nanofiber one can consider the relatively low voltage region of the I-V characteristics in terms of the linear region in conventional MOSFETs. Then from the transconductance, the /Afet can be estimated [82] as... 

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