Memory elements

A future optical device exploiting these two discoveries could write, read and operate on electron spins, while using patterned magnetic regions as memory elements. The region of large nuclear polarization rotates electron spins as they pass by- one necessary operation for quantum computing."... 

Josephson junctions may be arranged in a variety of ways for other purposes. Perhaps, the best-known application is to computers combinations of Josephson junctions can be designed to act as a very fast switch with low power dissipation or as a memory element. The theoretical switching time is about lOpsec and the power dissipation about InW, giving a product of switching time per power consumption several orders of magnitude better than that of transistors. 

Photochromic dendritic polymers 74 considered as optical memory elements were characterized (08CC5755). 

This 4 Mb FRAM utilizes lead zirconate titanate (PZT) as the active memory element a similar prototype has been made by Matsushita/Panasonic using strontium bismuth tantalate (SET). A 32-Mb SET memory has more recently been announced by Samsung. Device performances are similar in each case. The PZT device has the advantage that it can be processed at lower temperatures (450 °C, compared with ca. 650 °C for SET) the SET devices have the environmental advantage that they are lead-free. 

In addition to requiring high dielectric films for DRAM capacitors (dynamic random access memories) and for the active memory elements in FRAMs, the microelectronics industry has a stated demand for a replacement for Si02 gate oxides very soon. The leading candidate is hafnia (Hf02), and there are significant opportunities for the ferroelectrics community to contribute to the solution of this problem. 

Pina, F., Maestri, M., and Balzani, V., Photochromic systems based on synthetic flavylium compounds and their potential use as molecular-level memory elements, in Handbook of Photochemistry and Photobiology, Abdel-Mottaleb, M.S.A. and Nalwa, H.S.Eds., American Scientific Publishers, Stevenson Ranch, 2003, 3, 411. 

An interesting futuristic application is in the field of molecular electronics where a one-dimensional molecular wire such as polyacetylene in combination with a suitable molecular switch, e.g. salicylideneanilines, would yield a molecular microchip whose information storage capacity would be about 10 times that of a conventional microchip. A new generation of high performance computer with memory elements of nanometre dimensions is visualized on the basis of such molecular microchips. 

While with photochromic solids, light is used to cause colour change and detect it, with electrochromic solids, an electric field is used to change colour. Certain hemiquinones whose colour is externally switchable by an electric field are potentially useful as memory elements. 

A latching circuit waits for an event to occur. Once that event occurs, the latch output changes state and will ignore any further events until reset. This can be described as a memory element. The latch has many applications in the system. For example, if a failure mode occurs in the system, a shutdown signal may be sent to the latch circuit, which will shut down the system and prevent any further possible damage. The system will remain shut down until the power to the system is recycled. 

Information technology has revolutionized daily life in the last decades and the continuously increasing amount of data to be stored and manipulated strongly stimulated the search for switching and memory elements as tiny as a single molecule. Molecular switches can be converted from one state to another by an external stimulus such as light, electricity or a chemical reaction. Like with their macroscopic counterparts, one is able to control numerous functions and properties of materials and devices. 

Thermistors can be connected to a microprocessor-based memory element and packaged as a portable element. When the temperature-memory-pack unit is retracted from the process, it can be interrogated by a computer to store the... 

For non-volatile random access memories (NV-RAMs in which the stored information is retained even if power to the chip is interrupted), ferroelectrics serve not just as capacitors (as in the case of the DRAM, described below), but as the memory element itself. Their principal advantages in this application are low-voltage (1.0 V) operation, small size (about 20% of a conventional EEPROM cell - and cost is proportional to size once high-yield production is achieved), radiation hardness (not just for military applications but also for satellite communications systems) and very high speed (60 ns access time in commercial devices, sub-nanosecond in laboratory tests on single cells). 

A limited amount of trapping (either intrinsically or extrinsically) is helpful in that it ensures a deep OFF state of the device during the time at which other lines are addressed that is a (properly adjusted) hysteresis can serve as a memory element over the frame time (Ast, 1982a,b, 1983). This argument is not readily accepted by those who believe that a device must be inherently stable to function in a reliable manner. However, Luo et al. (1983) arrived at an identical conclusion in their analysis of the switching performance of CdSe transistors in matrix-addressed LC displays. It is very important that the trapping be noncumulative. Since the duty cycle of a... 

Electronic switches are solid-state devices that can be changed from a nonconducting OFF state to a conducting ON state by an appropriate electrical signal. The importance of such devices in the development of solid-state digital electronics has been enormous and is likely to remain so in the foreseeable future, especially with the increasing demand for memory elements. 

Shared Memory A mechanism that allows any processor to access any memory element using the same method and without the explicit cooperation of any other processor. 

Since a cache should be fast it is constructed using SRAM. A typical solution is an LI cache on the same chip as the CPU and an external L2 cache made up of SRAM. Caches are organized in a number of equal sized slots known as cache lines. A cache line consists of several consecutive memory addresses. The line size varies from design to design, but is usually in the range of 64 to 512 bytes wide. Exactly how a lower level of memory is mapped to a higher and smaller level has a number of variations. At one extreme, the direct-mapped cache maps each memory element to exactly one of the cache lines. This can be quite restrictive. The opposite in flexibility is the fully associative cache which can map each memory address to any of the cache lines. The compromise between these extremes is called a set-associative cache. This means that a memory element can be mapped to a number, say 4, cache lines. Such a cache is then said to be 4-way set-associative. 

---