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High-K dielectric

A. Scott, A. Dianat, F. Borrnert, A. Bachmatiuk, S. Zhang, J.H. Warner, et al., The catalytic potential of high-K dielectrics for graphene formation, Applied Physics Letters, 98 (2011) 073110. [Pg.40]

The discussion of potential benefits and drawbacks of using high-k dielectrics as a gate oxide for power SiC UMOS transistors has been made in several publications [8, 10, 11]. A comparative analysis of different insulating materials suitable as gate... [Pg.158]

This section deals with the application of the techniques described above to one of the most important problems for current microelectronics, namely the epitaxial growth of a thin high-k dielectric film on a silicon surface. For a... [Pg.493]

G.-M. Rignanese, X. Gonze, A. Pasquarello, "Ab-Initio Calculations of the Structural, Electronic and Dynamical Properties of High-k Dielectrics", Ed. M. Houssa, Institute of Physics Publishing, 2004, pp 431. [Pg.36]

Use of high-k nanoparticles — Analogous to the nanoparticle conductors discussed previously, it may be possible to print high-k dielectrics using nanoparticles. To date, there have been significant difficulties in producing such films with low leakage, since there tend to be substantial defects such as voids, cracks, etc., in such films. [Pg.306]

Capacitors PolySi or med-high k dielectric capacitors PolySi or high k dielectric (Ru ) capacitors... [Pg.30]

Park C, Cho BJ, Tang LJ, Kwong DL. Substituted aluminum metal gate on high-k dielectric for low workfunction and fermi-level pinning free. lEDM tech digest 2004. p 299-302. [Pg.685]

Figure 4.18. Cross-section schematic of an advanced transistor design. Features illustrated are (a) raised source and drain contacts, (b) an SOI substrate that prevents off-state leakage from source to drain, and (c) a high-K dielectric gate insulator. These three components employed in tandem are the basis of a faster generation of transistors referred to as terahertz transistors. ]... Figure 4.18. Cross-section schematic of an advanced transistor design. Features illustrated are (a) raised source and drain contacts, (b) an SOI substrate that prevents off-state leakage from source to drain, and (c) a high-K dielectric gate insulator. These three components employed in tandem are the basis of a faster generation of transistors referred to as terahertz transistors. ]...
There are three types of high-K dielectrics (measured dielectric constants in parentheses) ... [Pg.173]

Why is Ti02 used in dye-sensitized solar cells (DSCs) What other oxides would possibly be useful As discussed in this Chapter, next-generation CMOS ICs will employ high-K dielectric films as the gate insulator. A potential roadblock to this replacement is the possible incompatibility with current gate stacks - explain this problem, with possible solutions. [Pg.218]

This chapter has not been organized historically to trace research that has culminated world-wide in the introduction of high-k dielectrics into commercial advanced semiconductor devices, but instead is organized to describe the experiments and theory that underpin the importance of J-T effects in nano-crystalline thin film TM oxides, most importantly in the intrinsic bonding defects that limit device performance and reliability [1]. [Pg.768]

All of the thin films of this paper, and in many other studies of high-k dielectrics, are generally deposited at low temperatures, <500 °C. In this chapter the RPECVD process is performed at 300 °C in order to minimize the formation, and subsequent incorporation of OH impurity groups. At this temperature, and independent of the film thickness, the kinetics for organization of primitive unit cells into larger electronic unit cells is effectively suppressed, and J-T distortions cannot be observed independent of the film thickness. [Pg.780]

In principle, for a given thickness of dielectric, a high-k dielectric is preferable to a low-k dielectric for an FFT application, which requires the FFT to exhibit a high drive current at low drive voltage. Various solution-processable high-k dielectrics for low-voltage OFFTs have been used in the literature, such as anodized AI2O3... [Pg.113]

New materials are applied to maximize the capacity of device. To increase the capacitance of cap used in DRAM, sfudies about high-k dielectric material are in process. Elash memory uses a gate material with polysilicon by reason of high speed and stable storage. To reduce semiconductor device RC delay, Cu metal lines and low-k are being introduced. This section represents the concept of CMP processing being introduced to DRAM and NAND flash devices. [Pg.151]

Thangadurai, R Kaplan, W. D. Mikhelasbvili, V Eisenstien, G. 2009. The influence of electron-beam irradiation on electrical characteristics of metal-insulator-semiconductor capacitors based on a high-k dielectric stack of HfTiSiO(N) and HfTiO(N) layers. Microelectronics Reliability, 49(7) 716-720. [Pg.218]

In this process, the substrate is placed inside a reactor supplied by different gases [21], The principle of the process is that a chemical reaction takes place between the source gases producing a solid material which condenses on all surfaces inside the reactor. CVD is widely used in the semiconductor industry to deposit various materials such as polycrystalline, amorphous, and epitaxial silicon, carbon fiber, filaments, carbon nanotubes, Si02, silicon-germanium, tungsten, silicon nitride, silicon oxynitride, titanium nitride, and various high-k dielectrics. [Pg.218]

Bennett, X., Beebe, M., Sparks, C., Gondran, C., Vandervorst, W. (2004) Sputter rate variations in silicon under high-k dielectric films. Applied Surface Science, 257-252,565-568. [Pg.935]


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See also in sourсe #XX -- [ Pg.17 , Pg.368 , Pg.378 ]




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