CVD oxide

Silicon nitride (Si3N4) is a major industrial material which is produced extensively by CVD for electronic and stmctural applications. It is an excellent electrical insulator and diffusion barrier (to sodium and water vapor) and has replaced CVD oxides in many semiconductor... 

Sputtering i s presently the maj or thin-film process for the production of deicing coatings. The coating is satisfactory from an optical standpoint although transmission could still be improved, but it has poor scratch resistance and must be sandwiched between the two layers of safety glass. The CVD oxides films shown in Table 16.1 are particularly attractive since they are inherently abrasion resistant and could be used on the outer surface of the glass. 

FIGURE 13.7 Removal rate and HDP-CVD oxide/Sl3N4 selectivity versus (down-force) X (table rpm) obtained on a rotary-type polisher using high-selectivity slurry. 

There are many types of silicon oxides such as thermal oxide, CVD oxide, native oxide, and anodized oxide. Only native oxide and anodic oxide are directly relevant in the context of this book. Anodic oxide film, which is involved in most of the electrochemical processes on silicon electrodes, has not been systematically understood, partly due to its lack of application in mainstream electronic device fabrication, and partly due to the great diversity of conditions under which anodic oxide can be formed. On the other hand, thermal oxide, due to its importance in silicon technology, has been investigated in extremely fine detail. This chapter will cover some aspects of thermal oxide such as growth kinetics and physical, electrical, and chemical properties. The data on anodic oxide will then be described relative to those of thermal oxide. 

The etch rate of CVD oxide is generally higher than that of thermal oxide as shown in Eig. 4.2 and Eig. 4.19." It is strongly affected by the formation conditions as, for example, shown in Eig. 4.20. " It has been found that the etch rate of the LPCVD Si02 oxide in diluted HP solution is lower than conventional CVD film. In addition to the formation conditions, the etch rate of CVD oxides is determined by (I) type and concentration of the dopant, (2) condition of the postdeposition treatment, and (3) composition of etching solution. 

Figure 1.3. The same situation as in figure 1.2 but now after the deposition of a dielectric layer (for example plasma enhanced CVD-oxide).

In the area of CVD oxide layers the PECVD (plasma-enhanced CVD) offers the deposition of dielectric films at low process temperatures of about 130-300 °C. During the investigations several oxide layers with different ratios of the process gases argon-2% silane and oxygen were tested as gate dielectrics for the OFETs. 

Figure 16.8 Process sequence for STI oxide (b) trench oxide fiii with CVD oxide.

Following the STI etch operation, the wafer is again cleaned to remove contamination and surface oxide, after which it undergoes a high-temperature oxidation in a furnace in the presence of oxygen. This results in the growth of a thin layer of silicon dioxide (called the liner oxide) in the exposed walls of the isolation trenches. The liner oxide serves to improve the interface between the silicon and the trench CVD oxide that will be subsequently deposited. The trench is then filled with CVD oxide (see Fig. 16.8). 

Sidewall spacers are formed alongside the polygates to prevent the high-dose dopants used in the S/D implant step from penetrating too close to the channel where S/D punch-through could occur. The sidewall spacer formation process comprises two major process steps. These include the deposition of a CVD oxide layer across the surface of the wafer, followed by etching back of this... 

Figure 13 Relationship between inside CVD oxide wall angle and CVDSiO2 Sickness. CVDgi0 at 780°C.

Modification of the silica surfaces by different oxides at M = Al, Cr, Ti, P (Figure 37.12) and others (M = V, Zn, Sn) typically reduces the decomposition temperature [22]. The MS thermogram shape depends on the kind of CVD-oxides (C < 5 wt.%), that is, its catalytic capability in the decomposition of PDMS however. 

The states of intact and dissociatively adsorbed water, the impact of nonstandard synthesis conditions on the structural-adsorptive properties of fumed silicas and related oxides, developments of overall conceptions and ideas related to the kinetics, dynamics, and mechanisms of surface reactions, the classifications of these reactions, developments in synthesis of stable Si-C bonds, different CVD-oxides on the fumed silica surfaces, and other results obtained at the Institute of Surface Chemistry (Kiev, Ukraine) are noteworthy and show new possibilities in preparation of materials based on fumed silicas and related oxides for different applications in medicine, biotechnology, environmental, and human protection, as well as in industry. 

The frequency of the Si—O—Si stretching band of a thick CVD oxide is close to that of a thermal oxide of the same thickness [28, 53-55]. Thus, the... 

Figure 5.5. IR absorption of (1) CVD oxide (SiH4 with 60% concentrated H2O2) and (2) thermal oxide produced using O2 at 1050°C. Reprinted, by permission, from F. Gaillard, P. Brault, and P. Brouquet, J, Vac. Sc/. Techno . A 15, 2478 (1997). Copyright 1997 American Vacuum Society.

Low-temperature deposition of CVD oxides is an attractive option in IC production because of its low cost and it minimizes degradation of the conducting layers of aluminum or other metals. The influence of precursor concentrations on the composition and density of the SiO layers in Al-SiOj -Si devices produced by TEOS decomposition in oxygen atmosphere at T = 300°C has been studied [28]. The A1 contacts are deposited by electron beam evaporation. The IRRAS results in the spectral range of 1000-1300 cm are presented in Fig. 6.6. As seen, the shape of the absorption bands depends substantially on the ratio of gaseous reactants, M = Cqj/Cteos-... 

Figure 6.6. The p-polarized IRRAS at 75° incidence of Ai-SiOx-Si devices containing CVD oxide grown with reactant concentrations in ratio M = Nq /Njbos of (1) 0, (2)0.3, (3)0.3, (4)1.6, and (5) 2.0.

By deep reactive ion etching (DRIE) of a silicon substrate channel that is 500 mm wide and 250 mm deep, serpentine-shaped long channels are fabricated with large surface areas (see Fig. 6.43). A layer of CVD oxide (1.5-2 mm thick) is first deposited and densi-fled on the Si wafer. A mask with the patterns for the flow channel and inlet/outlet ports is used to pattern a layer of photoresist. The patterns are transferred into the oxide layer using a buffered oxide etch (ammonium fluoride and hydrogen fluoride in water). The photoresist is then removed using a sulfuric acid and hydrogen peroxide mixture, and then a new layer is coated. A second mask... 

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