Component instantiation

We ll begin our discussion of component kits with an example to illustrate the basic principles and later show how they apply to larger-scale (and more business-oriented) components. These examples use various kinds of connectors between component instantiations, coupling service requirement points (ports) in one to service provision points... 

Synthesis is not the right mechanism to build a memory such as a ROM or a RAM. RAMs are usually available predefined in a technology library. When a module such as a RAM is required, it is better to treat this as a component, instantiate this in the model, and then synthesize the instantiating model. A synthesis tool merely creates a black box for the RAM into which the designer would later link in the RAM module. 

The hierarchical network of ProcVhdl matches the component instantiation concept for structural descriptions in Vhdl, with communication carried out by simple Vhdl signals. This match would in fact be possible for most simulator-based languages, and is mainly a consequence of the choice of asynchronous communication protocols in the hardware model this model places very few restrictions on the actual low-level signal behavior. 

A component instantiation statement creates a unique occurrence or instance of a particular component within an architecture. The statement... 

A component instantiation is a concurrent statement that creates a single occurrence of a particular component. Use the following syntax ... 

The architecture body illustrates another way to instantiate components in a design. Again, there are no component declaration statements in the architecture s declarative part. However, this time these declarations do not even exist in a package. Instead, the components are directly instantiated by specifying the name of the entity and architecture (in parentheses) in the component instantiation statement. The port list follows in the normal way. 

Figure 4.25 Two-, three- and four-input Nand gate components instantiated in STRUCTURAL .

Those that evaluated every condition sequentially but still did not verify that only one of them was TRUE. These circuits contained Component instantiations or Concurrent signal assignments. 

The component is compiled into the working directory in this case and therefore no explicit references to libraries are required in the CONVERTER design xmit. Component instantiation has been made indirectly and so a component declaration is required. This has been placed in the declarative part of the architecture but could have appeared in a referenced package. 

A process, any statement outside of a process and a component instantiation are all concurrent statements. 

A direct component instantiation does not require a Component declaration statement. 

By using a structural design style and explicitly declaring the elements (component instantiation) a number of b efits can be obtained over inferred elements in a behavioural style. In particular the designer has full control of the implementation as ... 

Although it is feasible to create a small circuit with individual component instantiation statements, constructing port maps for large numbers of components is a tedious and error-prone exercise. If, as in this example,... 

The structural architectures demonstrated the use of manual and generated component instantiatiotrs in the creation of the 4-bit shift register A component instantiated from a vendor s library will always be optimized. It is therefore appropriate in these examples to instantiate the optimized versions of the D- and JK-type flip flops. 

Fortunately, to enable some flexibility, a range of type conversion functions are available within standard IEEE and vendor tibraries diat will allow conversion between types. These can be of particular benefit when using old components or modules in a design that was created using different types. The only restriction set by many synthesizers is that type conversion cannot be done in the component instantiation statement. 

Bodi conversion functions and strengdi strippers can be used like normal functions. The only exception to this is that some synthesizers may not allow them to be used in parameter lists when calling other fimctions or procedures. Additionally, neither function can be called in the port map of a component instantiation statement. 

The parameters contained in a port map, procedure, component instantiation, etc. must follow certain rules. The key restrictions are as follows. 

A type conversion or any other function is not supported in a component instantiation statement. Fimction calls are supported when nested in other functions or procedures. 

The particular VHDL constructs that support this include component instantiations, where other design elements can be seamlessly incorporated into a design (section 4.2.2) the use of procedures and functions to both partition the design task and facilitate top-down design techniques (section 6.2.2 for functions and section 7.3.2 for procedures) the use of blocks to structure the design description (section 7.2.2). 

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