Wafer-scale planarity

2 Wafer-Scale Planarity Wafer-scale nonplanarities are not often well characterized in IC processing because their effect on yield is often low compared to other processing parameters however, work has been reported on its effects on electrical performance [99,100]. For the characterization of 3D integration and wafer-level packaging (WLP) approaches such as the use of redistribution layers, wafer-level planarization requirements have not been 

FIGURE 15.12 Schematic representation of common feature-scale nonplanarities arising from damascene patterning electroplated copper into silicon dioxide trenches (from Ref 98). 

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An important component in the process flow is a through-wafer via with a nitride liner (and metal fill) that can act as an etch stop for the grinding and polishing wafer-thinning step. This capability allows uniform thinned layers and could provide good wafer-scale planarity for subsequent processing (although characterization of wafer-level planarization has not been reported to date) [41]. Available product information describes the performance and specifications of 3D components [40,42]. 

Sundararajan, S. andXhakurta, D., Two-Dimensional Wafer-Scale Chemical-Mechanical Planarization Models Based on Lubrication Theory and Mass Transport, Journal of the Electrochemical Society, Vol. 146, No. 2, 1999, pp. 761-766. 

In Section II, we focus first on wafer-scale models, including macroscopic or bulk polish models (e.g., via Preston s equation), as well as mechanistic and empirical approaches to model wafer-scale dependencies and sources of nonuniformity. In Section III, we turn to patterned wafer CMP modeling and discuss the pattern-dependent issues that have been examined we also discuss early work on feature-scale modeling. In Section IV, we focus on die-scale modeling efforts and issues in the context of dielectric planarization. In Section V, we examine issues in modeling pattern-dependent issues in metal polishing. Summary comments on the status and application of CMP modeling are offered in Section VI. 

Efficient die-scale planarization must extend across the entire wafer for rational use of CMP in a production environment. CMP rate nonuniformity has been a significant and persistent problem since its first use, and has been the subject of much investigation. 

Thakurta DG, Schwendeman DW, Gutmann RJ, Shankar S, Jiang L, Gill WN. Three-dimensional wafer-scale copper chemical-mechanical planarization model. Thin Solid Films 2002 414(l) 78-90. 

A wafer scale CMP process will fall into one of the three categories listed above. In the first case, the load is supported almost entirely via pad wafer contact. In the second case the load is supported partially by pad-wafer contact and partially by hydrodynamic pressure on the slurry between the wafer and pad. In the final case, the load is supported entirely by a continuous fluid layer of slurry between the wafer and pad. As discussed by Preston (Section 4.1), polish rate is proportional to pressure. Because each of these modes is likely to distribute pressure differently, the ability of a CMP process to remove material and to planarize will be affected by which mode a given CMP process operates within. 

Chemical-Mechanical Planarization involves often-conflicting requirements at various length scales—e.g. uniform removal at the wafer scale, but non-uniform removal of high areas to achieve planarization at the feature scale. In conjunction with machine process controls, the management of pressure by the consumables is one key to balancing these requirements. 

Thakurta, D.G., Schwendeman, D.W., Gutmann, R.J., et al., 2002. Three-dimensional wafer-scale copper chemical—mechanical planarization model. Thin Solid Films 414, 78—90. 

Nevertheless, since it relies on the abrasive properties of metal oxide particles suspended in a colloidal dispersion, the activity of the chemical reagents, a relatively softer polymeric pad, and a wafer carrier to hold the wafer face down to achieve the nanolevel wafer and die scale planarity, it is tmly counterintuitive in its scope. The side containing the active elements of each and every wafer, always processed in an ultraclean and extremely low particle environment, is exposed to bHlions of abrasive particles multiple times, and after each pass all the particles and the chemical agents in the dispersion need to be completely removed from the wafer surface during post-CMP processing to prevent surface contamination and degradation. In spite of this, CMP has proven to be... 

Why is the planarization length desirable at die size Will a planarization length at wafer diameter scale really be an advantage ... 

Runnels assumes the existence of a continuous fluid layer between the pad and the wafer and models planarization using a feature scale fluid-based-wear model. Runnels uses fluid mechanics to model the normal and shear stresses that are developed at the feature scale. Material removal rate is assumed to depend only upon the shear stress, Ot, according to ... 

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